EPM7064SLC84-5
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Package / Case | PLCC |
| Number of Pins | 84 |
| Packaging | Bulk |
| Published | 1998 |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Moisture Sensitivity Level (MSL) | 2 |
| Number of Terminations | 84 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | J BEND |
| Peak Reflow Temperature (Cel) | 220 |
| Supply Voltage | 5V |
| Terminal Pitch | 1.27mm |
| Frequency | 250MHz |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 84 |
| Qualification Status | Not Qualified |
| Temperature Grade | COMMERCIAL |
| Max Supply Voltage | 3.6V |
| Min Supply Voltage | 3V |
| Number of I/O | 68 |
| Memory Type | EEPROM |
| Propagation Delay | 5 ns |
| Turn On Delay Time | 5 ns |
| Frequency (Max) | 175.4MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 1250 |
| Number of Programmable I/O | 68 |
| Number of Logic Blocks (LABs) | 4 |
| Speed Grade | 5 |
| Output Function | MACROCELL |
| Number of Macro Cells | 64 |
| JTAG BST | YES |
| In-System Programmable | YES |
| Length | 29.3116mm |
| Width | 29.3116mm |
| RoHS Status | RoHS Compliant |
| Lead Free | Contains Lead |
EPM7064SLC84-5 Overview
There are 64 macro cells, which provide radio coverage via high-power cell towers, antennas or masts in a mobile phone network.In the PLCCpackage, you will find it.There are 68 I/Os on the board.Terminations of devices are set to [0].This electrical part has a terminal position of QUADand is connected to the ground.It is powered by a voltage of 5V volts.It is a part of family [0].It is recommended that the chip be packaged by Bulk.It has 84pins programmed.1250gates are devices that serve as building blocks for digital circuits.In this case, EEPROMwill be used to store the data.Surface Mountis the mounting point of this electronic part.The device has a pinout of [0].It operates with the maximal supply voltage of 3.6V.In order for it to operate, a supply voltage of 3Vis required.In total, there are 68programmable I/Os.There can be 250MHz frequency achieved.The operating temperature should be higher than 0°C.It is recommended that the operating temperature be lower than 70°C.Its basic building block is composed of 4 logic blocks (LABs).The maximal frequency should be lower than 175.4MHz.A programmable logic type can be categorized as EE PLD.
EPM7064SLC84-5 Features
PLCC package
68 I/Os
84 pin count
84 pins
4 logic blocks (LABs)
EPM7064SLC84-5 Applications
There are a lot of Altera EPM7064SLC84-5 CPLDs applications.
- Complex programmable logic devices
- TIMERS/COUNTERS
- White goods (Washing, Cold, Aircon ,...)
- PULSE WIDTH MODULATION (PWM)
- State machine design
- Discrete logic functions
- Configurable Addressing of I/O Boards
- Programmable power management
- Parity generators
- I/O PORTS (MCU MODULE)
