EPM7064SLC84-5N
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Mount | Surface Mount |
| Package / Case | PLCC |
| Number of Pins | 84 |
| Published | 2014 |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Discontinued |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 84 |
| ECCN Code | EAR99 |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | J BEND |
| Peak Reflow Temperature (Cel) | 245 |
| Supply Voltage | 5V |
| Terminal Pitch | 1.27mm |
| Frequency | 250MHz |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Pin Count | 84 |
| Qualification Status | Not Qualified |
| Operating Supply Voltage | 5V |
| Temperature Grade | COMMERCIAL |
| Max Supply Voltage | 5.25V |
| Min Supply Voltage | 4.75V |
| Number of I/O | 68 |
| Memory Type | EEPROM |
| Propagation Delay | 5 ns |
| Turn On Delay Time | 5 ns |
| Frequency (Max) | 175.4MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 1250 |
| Number of Programmable I/O | 68 |
| Number of Logic Blocks (LABs) | 4 |
| Output Function | MACROCELL |
| Number of Macro Cells | 64 |
| JTAG BST | NO |
| In-System Programmable | YES |
| Height Seated (Max) | 5.08mm |
| Length | 29.3116mm |
| Width | 29.3116mm |
| RoHS Status | RoHS Compliant |
EPM7064SLC84-5N Overview
There are 64 macro cells. A macro cell is a cell in a mobile phone network that provides radio coverage through the use of a high-power cell site (tower, antenna or mast).It is part of the PLCC package.The device has 68inputs and outputs.The termination of a device is set to [0].This electrical part has a terminal position of QUADand is connected to the ground.It is powered by a voltage of 5V volts.It belongs to the family [0].In this chip, the 84pins are programmed.For digital circuits, there are 1250gates. These devices serve as building blocks.If high efficiency is desired, the supply voltage should be kept at [0].It is recommended to store data in [0].Surface Mountis used to mount this electronic component.There are 84pins on it.There is a maximum supply voltage of 5.25Vwhen the device is operating.It is powered by 4.75Vas its minimum supply voltage.There are 68 programmable I/Os, which are method of data transmissions, via input/output (I/O), between a central processing unit (CPU) and a peripheral device, such as a network adapter or a Parallel ATA storage device. There can be 250MHz frequency achieved.In order to operate properly, the operating temperature should be higher than 0°C.It is recommended that the operating temperature be below 70°C.Its basic building block is composed of 4 logic blocks (LABs).There should be a lower maximum frequency than 175.4MHz.It is possible to classify programmable logic as EE PLD.
EPM7064SLC84-5N Features
PLCC package
68 I/Os
84 pin count
84 pins
4 logic blocks (LABs)
EPM7064SLC84-5N Applications
There are a lot of Altera EPM7064SLC84-5N CPLDs applications.
- Address decoders
- White goods (Washing, Cold, Aircon ,...)
- Field programmable gate
- Complex programmable logic devices
- Multiple Clock Source Selection
- STANDARD SERIAL INTERFACE UART
- DDC INTERFACE
- State machine control
- Wide Vin Industrial low power SMPS
- LED Lighting systems
