Parameters |
Output Function |
MACROCELL |
Number of Macro Cells |
64 |
JTAG BST |
YES |
Voltage Supply - Internal |
4.75V~5.25V |
Delay Time tpd(1) Max |
7.5ns |
Number of Logic Elements/Blocks |
4 |
Height Seated (Max) |
5.08mm |
Length |
29.3116mm |
Width |
29.3116mm |
RoHS Status |
Non-RoHS Compliant |
Mounting Type |
Surface Mount |
Package / Case |
84-LCC (J-Lead) |
Surface Mount |
YES |
Operating Temperature |
0°C~70°C TA |
Packaging |
Tray |
Series |
MAX® 7000S |
JESD-609 Code |
e0 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
Number of Terminations |
84 |
ECCN Code |
EAR99 |
Terminal Finish |
Tin/Lead (Sn/Pb) |
Additional Feature |
CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
QUAD |
Terminal Form |
J BEND |
Peak Reflow Temperature (Cel) |
220 |
Supply Voltage |
5V |
Terminal Pitch |
1.27mm |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
EPM7064 |
Qualification Status |
Not Qualified |
Supply Voltage-Max (Vsup) |
5.25V |
Power Supplies |
3.3/55V |
Programmable Type |
In System Programmable |
Number of I/O |
68 |
Clock Frequency |
166.7MHz |
Propagation Delay |
7.5 ns |
Number of Gates |
1250 |
EPM7064SLC84-7 Overview
There are 64 macro cells, which are cells in a mobile phone network that provides radio coverage served by a high-power cell site (tower, antenna or mast).You can find it in package [0].The device has 68inputs and outputs.The device is programmed with 84 terminations.QUADis the terminal position of this electrical part.The power source is powered by 5Vvolts.This part is included in Programmable Logic Devices.It is recommended to package the chip by Tray.To ensure reliability, the device operates at a temperature of [0].It is recommended to mount the chip by Surface Mount.The MAX? 7000Sseries FPGA is one of these types.If you use this device, you will also find [0].Its related parts can be found in the [0].1250gates are used to construct digital circuits.There are 4 logic elements or blocks present.In order for the device to operate, it requires 3.3/55V power supplies.In this case, the maximum supply voltage (Vsup) is 5.25V.Ideally, its clock frequency should not exceed 166.7MHz.
EPM7064SLC84-7 Features
84-LCC (J-Lead) package
68 I/Os
The operating temperature of 0°C~70°C TA
3.3/55V power supplies
EPM7064SLC84-7 Applications
There are a lot of Intel EPM7064SLC84-7 CPLDs applications.
- Auxiliary Power Supply Isolated and Non-isolated
- Reset swapping
- I/O expansion
- Interface bridging
- ToR/Aggregation/Core Switch and Router
- PLC analog input modules
- Page register
- DMA control
- Custom state machines
- Preset swapping