EPM7064STC100-10N.
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Package / Case | TQFP |
| Number of Pins | 100 |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 100 |
| ECCN Code | EAR99 |
| Terminal Finish | Matte Tin (Sn) - annealed |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Terminal Pitch | 0.5mm |
| Frequency | 125MHz |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Pin Count | 100 |
| Operating Supply Voltage | 5V |
| Temperature Grade | COMMERCIAL |
| Max Supply Voltage | 5.25V |
| Min Supply Voltage | 4.75V |
| Number of I/O | 68 |
| Memory Type | EEPROM |
| Propagation Delay | 10 ns |
| Turn On Delay Time | 10 ns |
| Frequency (Max) | 175.4MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 1250 |
| Number of Programmable I/O | 68 |
| Number of Logic Blocks (LABs) | 4 |
| Speed Grade | 10 |
| Output Function | MACROCELL |
| Number of Macro Cells | 64 |
| JTAG BST | NO |
| In-System Programmable | YES |
| Height | 1mm |
| Length | 14mm |
| Width | 14mm |
| Radiation Hardening | No |
| REACH SVHC | Unknown |
| RoHS Status | RoHS Compliant |
| Lead Free | Lead Free |
EPM7064STC100-10N. Overview
Currently, there are 64 macro cells, which are low-power cell sites (towers, antennas, masts) that serve as radio coverage.A TQFP package contains the item.As a result, it has 68 I/O ports programmed.There is a 100terminations set on devices.The terminal position of this electrical component is QUAD.It is powered from a supply voltage of 5V.This part is in the family [0].Chips are programmed with 100 pins.In digital circuits, there are 1250gates, which act as a basic building block.For high efficiency, the supply voltage should be maintained at [0].In this case, EEPROMwill be used to store the data.Surface Mountmounts this electronic component.It is designed with 100 pins.In this case, the maximum supply voltage is 5.25V.The minimal supply voltage is 4.75V.A total of 68programmable I/Os are available.This can be achieved at a frequency of 125MHz.It is recommended that the operating temperature exceeds 0°C.The operating temperature should be lower than 70°C.4logic blocks (LABs) make up this circuit.It should be below 175.4MHzat the maximal frequency.It is possible to classify programmable logic as EE PLD.
EPM7064STC100-10N. Features
TQFP package
68 I/Os
100 pin count
100 pins
4 logic blocks (LABs)
EPM7064STC100-10N. Applications
There are a lot of Altera EPM7064STC100-10N. CPLDs applications.
- SFP, QSFP, QSFP-DD, OSFP, Mini-SAS HD Port Management
- D/T registers and latches
- Bootloaders for FPGAs
- Digital designs
- Discrete logic functions
- Digital multiplexers
- Portable digital devices
- Random logic replacement
- Software-Driven Hardware Configuration
- Wireless Infrastructure Base Band Unit and Remote Radio Unit
