EPM7128AEFC100-10N
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Mount | Surface Mount |
| Package / Case | FBGA |
| Number of Pins | 100 |
| Published | 1998 |
| JESD-609 Code | e1 |
| Pbfree Code | yes |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 100 |
| ECCN Code | 3A991 |
| Terminal Finish | Tin/Silver/Copper (Sn/Ag/Cu) |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Additional Feature | YES |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 1mm |
| Frequency | 125MHz |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Pin Count | 100 |
| Operating Supply Voltage | 3.3V |
| Temperature Grade | COMMERCIAL |
| Max Supply Voltage | 3.6V |
| Min Supply Voltage | 3V |
| Number of I/O | 84 |
| Memory Type | EEPROM |
| Propagation Delay | 10 ns |
| Turn On Delay Time | 10 ns |
| Frequency (Max) | 192.3MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 2500 |
| Number of Logic Blocks (LABs) | 8 |
| Speed Grade | 10 |
| Output Function | MACROCELL |
| Number of Macro Cells | 128 |
| JTAG BST | YES |
| In-System Programmable | YES |
| Height Seated (Max) | 1.7mm |
| Length | 11mm |
| Width | 11mm |
| Radiation Hardening | No |
| RoHS Status | RoHS Compliant |
| Lead Free | Lead Free |
EPM7128AEFC100-10N Overview
128macrocells exist, which are cells in a mobile phone network that are primarily composed of high-power towers, antennas, or masts.The product is contained in a FBGA package.The device has 84inputs and outputs.The device is programmed with 100 terminations.The terminal position of this electrical component is BOTTOM.A voltage of 3.3Vprovides power to the device.The part is included in Programmable Logic Devices.There are 100pins on the chip.When using this device, YESis also available.A digital circuit can be constructed using 2500gates.It is recommended that the supply voltage be kept at 3.3Vto maximize efficiency.In general, it is recommended to store data in [0].In this case, Surface Mountis used to mount the electronic component.The device is designed with pins [0].A maximum voltage of 3.6Vis required for operation.Normally, it operates with a voltage of 3VV as its minimum supply voltage.It is possible to achieve a frequency of 125MHz.Ideally, the operating temperature should be greater than 0°C.It is recommended that the operating temperature be below 70°C.Its basic building block is composed of 8 logic blocks (LABs).It is recommended that the maximal frequency be lower than 192.3MHz.A programmable logic type is classified as EE PLD.
EPM7128AEFC100-10N Features
FBGA package
84 I/Os
100 pin count
100 pins
8 logic blocks (LABs)
EPM7128AEFC100-10N Applications
There are a lot of Altera EPM7128AEFC100-10N CPLDs applications.
- Preset swapping
- Multiple DIP Switch Replacement
- Custom shift registers
- I/O expansion
- Voltage level translation
- Power automation
- Software-driven hardware configuration
- USB Bus
- Complex programmable logic devices
- TIMERS/COUNTERS
