EPM7128AEFC256-7
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Mount | Surface Mount |
| Package / Case | FBGA |
| Number of Pins | 256 |
| Published | 1998 |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Part Status | Discontinued |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 256 |
| ECCN Code | 3A991 |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Additional Feature | YES |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 220 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 1mm |
| Frequency | 166.67MHz |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 256 |
| Qualification Status | Not Qualified |
| Operating Supply Voltage | 3.3V |
| Temperature Grade | COMMERCIAL |
| Max Supply Voltage | 3.6V |
| Min Supply Voltage | 3V |
| Number of I/O | 100 |
| Memory Type | EEPROM |
| Propagation Delay | 7.5 ns |
| Turn On Delay Time | 7.5 ns |
| Frequency (Max) | 192.3MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 2500 |
| Number of Programmable I/O | 100 |
| Number of Logic Blocks (LABs) | 8 |
| Speed Grade | 7 |
| Output Function | MACROCELL |
| Number of Macro Cells | 128 |
| JTAG BST | YES |
| In-System Programmable | YES |
| Height Seated (Max) | 2.1mm |
| RoHS Status | RoHS Compliant |
EPM7128AEFC256-7 Overview
In the mobile phone network, there are 128macro cells, which are cells with high-power antennas and towers.There is a FBGA package containing it.It is programmed with 100 I/Os.256terminations have been programmed into the device.The terminal position of this electrical component is BOTTOM.There is 3.3V voltage supply for this device.This part is part of the family [0].In this chip, the 256pins are programmed.Additionally, this device is capable of displaying [0].As a building block for digital circuits, there are 2500gates.In order to maintain high efficiency, the supply voltage should be maintained at [0].In this case, EEPROMwill be used to store the data.This device is mounted by Surface Mount.There are 256 pins on the device.This device operates at a voltage of 3.6V when the maximum supply voltage is applied.Initially, it requires a voltage of 3Vas the minimum supply voltage.Currently, there are 100 Programmable I/Os available.This can be achieved at a frequency of 166.67MHz.In order to operate properly, the operating temperature should be higher than 0°C.A temperature less than 70°Cshould be used for operation.The program consists of 8 logic blocks (LABs).The maximal frequency should be lower than 192.3MHz.In programmable logic, a type of logic can be categorized as EE PLD.
EPM7128AEFC256-7 Features
FBGA package
100 I/Os
256 pin count
256 pins
8 logic blocks (LABs)
EPM7128AEFC256-7 Applications
There are a lot of Altera EPM7128AEFC256-7 CPLDs applications.
- Portable digital devices
- White goods (Washing, Cold, Aircon ,...)
- Configurable Addressing of I/O Boards
- Battery operated portable devices
- Power up sequencing
- Digital systems
- DMA control
- Network Interface Card (NIC) and Host Bus Adapter (HBA)
- Software-driven hardware configuration
- Custom shift registers
