EPM7128BFC100-10
| Parameters | |
|---|---|
| Frequency (Max) | 243.9MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 2500 |
| Number of Programmable I/O | 84 |
| Number of Logic Blocks (LABs) | 8 |
| Output Function | MACROCELL |
| Number of Macro Cells | 128 |
| JTAG BST | YES |
| In-System Programmable | YES |
| Height Seated (Max) | 1.7mm |
| Length | 11mm |
| Width | 11mm |
| RoHS Status | RoHS Compliant |
| Factory Lead Time | 1 Week |
| Mount | Surface Mount |
| Package / Case | FBGA |
| Number of Pins | 100 |
| Published | 1998 |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 100 |
| ECCN Code | 3A991 |
| Terminal Finish | Tin/Lead (Sn63Pb37) |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Additional Feature | YES |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 235 |
| Supply Voltage | 2.5V |
| Terminal Pitch | 1mm |
| Frequency | 125MHz |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 100 |
| Qualification Status | Not Qualified |
| Operating Supply Voltage | 3.3V |
| Temperature Grade | COMMERCIAL |
| Max Supply Voltage | 3.6V |
| Min Supply Voltage | 3V |
| Number of I/O | 84 |
| Memory Type | EEPROM |
| Propagation Delay | 10 ns |
| Turn On Delay Time | 10 ns |
EPM7128BFC100-10 Overview
There are 128 macro cells. A macro cell is a cell in a mobile phone network that provides radio coverage through the use of a high-power cell site (tower, antenna or mast).It is contained in package [0].There are 84 I/Os programmed in it.100terminations have been programmed into the device.This electrical component has a terminal position of 0.Power is provided by a supply voltage of 2.5V volts.It is a part of family [0].Chips are programmed with 100 pins.It is also possible to find YESwhen using this device.There are 2500 gates, which are devices that acts as a building block for digital circuits. High efficiency requires the supply voltage to be maintained at [0].For data storage, EEPROMis adopted.Surface Mountis used to mount this electronic component.There are 100 pins on the device.It operates with the maximal supply voltage of 3.6V.Despite its minimal supply voltage of [0], it is capable of operating.There are 84 programmable I/Os, which are method of data transmissions, via input/output (I/O), between a central processing unit (CPU) and a peripheral device, such as a network adapter or a Parallel ATA storage device. This can be achieved at a frequency of 125MHz.The operating temperature should be higher than 0°C.A temperature lower than 70°Cis recommended for operation.8logic blocks (LABs) make up this circuit.The maximal frequency should be lower than 243.9MHz.A programmable logic type is classified as EE PLD.
EPM7128BFC100-10 Features
FBGA package
84 I/Os
100 pin count
100 pins
8 logic blocks (LABs)
EPM7128BFC100-10 Applications
There are a lot of Altera EPM7128BFC100-10 CPLDs applications.
- Address decoding
- USB Bus
- I/O expansion
- Digital systems
- Interface bridging
- ANALOG-TO-DIGITAL CONVERTOR (ADC)
- Parity generators
- Power up sequencing
- STANDARD SERIAL INTERFACE UART
- POWER-SAVING MODES
