Parameters |
Factory Lead Time |
1 Week |
Mount |
Surface Mount |
Package / Case |
FBGA |
Number of Pins |
100 |
Published |
1998 |
JESD-609 Code |
e1 |
Pbfree Code |
yes |
Moisture Sensitivity Level (MSL) |
3 |
Number of Terminations |
100 |
ECCN Code |
3A991 |
Terminal Finish |
Tin/Silver/Copper (Sn/Ag/Cu) |
Max Operating Temperature |
70°C |
Min Operating Temperature |
0°C |
Additional Feature |
YES |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
BOTTOM |
Terminal Form |
BALL |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
2.5V |
Terminal Pitch |
1mm |
Frequency |
125MHz |
Time@Peak Reflow Temperature-Max (s) |
40 |
Pin Count |
100 |
Qualification Status |
Not Qualified |
Temperature Grade |
COMMERCIAL |
Max Supply Voltage |
3.6V |
Min Supply Voltage |
3V |
Number of I/O |
84 |
Memory Type |
EEPROM |
Propagation Delay |
10 ns |
Turn On Delay Time |
10 ns |
Frequency (Max) |
243.9MHz |
Programmable Logic Type |
EE PLD |
Number of Gates |
2500 |
Number of Programmable I/O |
84 |
Number of Logic Blocks (LABs) |
8 |
Speed Grade |
10 |
Output Function |
MACROCELL |
Number of Macro Cells |
128 |
JTAG BST |
YES |
In-System Programmable |
YES |
Height Seated (Max) |
1.7mm |
Length |
11mm |
Width |
11mm |
RoHS Status |
RoHS Compliant |
EPM7128BFC100-10N Overview
This network has 128macro cells, which are cells that provide radio coverage provided by a high-power cell site (tower, antenna, mast).In the FBGApackage, you will find it.It is equipped with 84I/O ports.100terminations have been programmed into the device.This electrical part has a terminal position of BOTTOMand is connected to the ground.Power is supplied by a voltage of 2.5V volts.It is a part of the family [0].The chip is programmed with 100 pins.The device can also be used to find [0].It is possible to construct digital circuits using 2500gates, which are devices that serve as building blocks.In this case, EEPROMwill be used to store the data.Surface Mountis used to mount this electronic component.It is designed with 100 pins.It operates with the maximal supply voltage of 3.6V.Normally, it operates with a voltage of 3VV as its minimum supply voltage.A total of 84Programmable I/Os are present.There can be 125MHz frequency achieved.Ideally, the operating temperature should be greater than 0°C.It is recommended that the operating temperature be lower than 70°C.In its simplest form, it consists of 8 logic blocks (LABs).Maximum frequency should be less than 243.9MHz.Programmable logic types can be divided into EE PLD.
EPM7128BFC100-10N Features
FBGA package
84 I/Os
100 pin count
100 pins
8 logic blocks (LABs)
EPM7128BFC100-10N Applications
There are a lot of Altera EPM7128BFC100-10N CPLDs applications.
- Protection relays
- State machine control
- Storage Cards and Storage Racks
- Power automation
- DDC INTERFACE
- Pattern recognition
- I/O PORTS (MCU MODULE)
- Complex programmable logic devices
- Custom state machines
- ON-CHIP OSCILLATOR CIRCUIT