Parameters |
JESD-609 Code |
e0 |
Pbfree Code |
no |
Moisture Sensitivity Level (MSL) |
3 |
Number of Terminations |
100 |
ECCN Code |
3A991 |
Terminal Finish |
Tin/Lead (Sn63Pb37) |
Max Operating Temperature |
70°C |
Min Operating Temperature |
0°C |
Additional Feature |
YES |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
BOTTOM |
Terminal Form |
BALL |
Peak Reflow Temperature (Cel) |
235 |
Supply Voltage |
2.5V |
Terminal Pitch |
1mm |
Frequency |
333.33MHz |
Time@Peak Reflow Temperature-Max (s) |
30 |
Pin Count |
100 |
Operating Supply Voltage |
2.5V |
Temperature Grade |
COMMERCIAL |
Max Supply Voltage |
2.625V |
Min Supply Voltage |
2.375V |
Number of I/O |
84 |
Memory Type |
EEPROM |
Propagation Delay |
4 ns |
Turn On Delay Time |
4 ns |
Frequency (Max) |
243.9MHz |
Programmable Logic Type |
EE PLD |
Number of Gates |
2500 |
Number of Programmable I/O |
84 |
Number of Logic Blocks (LABs) |
8 |
Output Function |
MACROCELL |
Number of Macro Cells |
128 |
JTAG BST |
YES |
In-System Programmable |
YES |
Height Seated (Max) |
1.7mm |
Length |
11mm |
Width |
11mm |
Radiation Hardening |
No |
RoHS Status |
RoHS Compliant |
Mount |
Surface Mount |
Package / Case |
FBGA |
Number of Pins |
100 |
Published |
1998 |
EPM7128BFC100-4 Overview
128 macrocells are present in the mobile phone network, which offer radio coverage from a high-power cell tower, antenna, or mast.You can find it in package [0].It is programmed with 84 I/Os.Terminations of devices are set to [0].There is a BOTTOMterminal position on the electrical part in question.It is powered by a voltage of 2.5V volts.There is a part in the family [0].Chips are programmed with 100 pins.When using this device, YESis also available.2500gates are used to construct digital circuits.The supply voltage should be maintained at 2.5V for high efficiency.In general, it is recommended to store data in [0].It is mounted by Surface Mount.This board has 100 pins.In this case, the maximum supply voltage is 2.625V.With a minimal supply voltage of [0], it operates.A programmable I/O count of 84 has been recorded.This can be achieved at a frequency of 333.33MHz.It is recommended that the operating temperature exceeds 0°C.It is recommended that the operating temperature be below 70°C.In its simplest form, it consists of 8 logic blocks (LABs).It is recommended that the maximum frequency is less than 0.There are several types of programmable logic that can be categorized as EE PLD.
EPM7128BFC100-4 Features
FBGA package
84 I/Os
100 pin count
100 pins
8 logic blocks (LABs)
EPM7128BFC100-4 Applications
There are a lot of Altera EPM7128BFC100-4 CPLDs applications.
- Network Interface Card (NIC) and Host Bus Adapter (HBA)
- White goods (Washing, Cold, Aircon ,...)
- Dedicated input registers
- Wireless Infrastructure Base Band Unit and Remote Radio Unit
- Pattern recognition
- High speed graphics processing
- PULSE WIDTH MODULATION (PWM)
- Page register
- SFP, QSFP, QSFP-DD, OSFP, Mini-SAS HD Port Management
- Software-driven hardware configuration