EPM7128BFC256-10
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Package / Case | FBGA |
| Number of Pins | 256 |
| Published | 2014 |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 256 |
| ECCN Code | 3A991 |
| Terminal Finish | Tin/Lead (Sn63Pb37) |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Additional Feature | YES |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 220 |
| Supply Voltage | 2.5V |
| Terminal Pitch | 1mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 256 |
| Qualification Status | Not Qualified |
| Operating Supply Voltage | 3.3V |
| Temperature Grade | COMMERCIAL |
| Max Supply Voltage | 3.6V |
| Min Supply Voltage | 3V |
| Number of I/O | 100 |
| Memory Type | EEPROM |
| Propagation Delay | 4 ns |
| Frequency (Max) | 243.9MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 2500 |
| Number of Programmable I/O | 100 |
| Number of Logic Blocks (LABs) | 8 |
| Output Function | MACROCELL |
| Number of Macro Cells | 128 |
| JTAG BST | YES |
| In-System Programmable | YES |
| Height Seated (Max) | 3.5mm |
| Length | 17mm |
| Width | 17mm |
| RoHS Status | RoHS Compliant |
EPM7128BFC256-10 Overview
This network has 128macro cells, which are cells that provide radio coverage provided by a high-power cell site (tower, antenna, mast).A FBGA package contains the item.As a result, it has 100 I/O ports programmed.It is programmed that device terminations will be 256 .Its terminal position is BOTTOM.The power source is powered by 2.5Vvolts.It is a part of family [0].A chip with 256pins is programmed.When using this device, YESis also available.There are 2500 gates, which are devices that acts as a building block for digital circuits. A high level of efficiency can be achieved by maintaining the supply voltage at [0].In general, it is recommended to store data in [0].The electronic component is mounted by Surface Mount.The 256pins are designed into the board.A maximum supply voltage of 3.6Vis used in its operation.A minimum supply voltage of 3V is required for this device to operate.There are a total of 100 Programmable I/Os.Ideally, the operating temperature should be greater than 0°C.It is recommended that the operating temperature be below 70°C.It is composed of 8 logic blocks (LABs).It is recommended that the maximum frequency be less than 243.9MHz.There are several types of programmable logic that can be categorized as EE PLD.
EPM7128BFC256-10 Features
FBGA package
100 I/Os
256 pin count
256 pins
8 logic blocks (LABs)
EPM7128BFC256-10 Applications
There are a lot of Altera EPM7128BFC256-10 CPLDs applications.
- Custom state machines
- Custom shift registers
- Field programmable gate
- Auxiliary Power Supply Isolated and Non-isolated
- PLC analog input modules
- I/O PORTS (MCU MODULE)
- I/O expansion
- Dedicated input registers
- State machine design
- USB Bus
