Parameters |
Mount |
Surface Mount |
Package / Case |
FBGA |
Number of Pins |
256 |
JESD-609 Code |
e0 |
Pbfree Code |
no |
Moisture Sensitivity Level (MSL) |
3 |
Number of Terminations |
256 |
ECCN Code |
3A991 |
Terminal Finish |
Tin/Lead (Sn63Pb37) |
Max Operating Temperature |
85°C |
Min Operating Temperature |
-40°C |
Additional Feature |
YES |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
BOTTOM |
Terminal Form |
BALL |
Peak Reflow Temperature (Cel) |
220 |
Supply Voltage |
2.5V |
Terminal Pitch |
1mm |
Frequency |
166.67MHz |
Time@Peak Reflow Temperature-Max (s) |
30 |
Pin Count |
256 |
Qualification Status |
Not Qualified |
Operating Supply Voltage |
3.3V |
Temperature Grade |
INDUSTRIAL |
Max Supply Voltage |
3.6V |
Min Supply Voltage |
3V |
Number of I/O |
100 |
Memory Type |
EEPROM |
Propagation Delay |
7.5 ns |
Frequency (Max) |
243.9MHz |
Programmable Logic Type |
EE PLD |
Number of Gates |
2500 |
Number of Programmable I/O |
100 |
Number of Logic Blocks (LABs) |
8 |
Output Function |
MACROCELL |
Number of Macro Cells |
128 |
JTAG BST |
YES |
In-System Programmable |
YES |
Height Seated (Max) |
3.5mm |
Length |
17mm |
Width |
17mm |
RoHS Status |
RoHS Compliant |
EPM7128BFI256-7 Overview
A mobile phone network consists of 128macro cells, which are radio coverage cells served by a high-power cell site (tower, antenna or mast).It is contained in package [0].The device has 100inputs and outputs.Terminations of devices are set to [0].This electrical part is wired with a terminal position of BOTTOM.A voltage of 2.5Vprovides power to the device.It is a part of the family [0].It has 256pins programmed.This device is also capable of displaying [0].In digital circuits, 2500gates serve as building blocks.The supply voltage should be maintained at 3.3V for high efficiency.EEPROM is adopted for storing data.This electronic part is mounted in the way of Surface Mount.The device has a pinout of [0].A maximum supply voltage of 3.6Vis used in its operation.The minimal supply voltage is 3V.A programmable I/O count of 100 has been recorded.It is possible to achieve a frequency of 166.67MHz.There should be a temperature above -40°Cat the time of operation.It is recommended to keep the operating temperature below 85°C.It is composed of 8 logic blocks (LABs).It is recommended that the maximum frequency be less than 243.9MHz.In programmable logic, a type of logic can be categorized as EE PLD.
EPM7128BFI256-7 Features
FBGA package
100 I/Os
256 pin count
256 pins
8 logic blocks (LABs)
EPM7128BFI256-7 Applications
There are a lot of Altera EPM7128BFI256-7 CPLDs applications.
- Software-driven hardware configuration
- Synchronous or asynchronous mode
- Auxiliary Power Supply Isolated and Non-isolated
- Boolean function generators
- Wide Vin Industrial low power SMPS
- Multiple Clock Source Selection
- Bootloaders for FPGAs
- Page register
- Network Interface Card (NIC) and Host Bus Adapter (HBA)
- Reset swapping