Parameters |
Mount |
Surface Mount |
Package / Case |
PLCC |
Number of Pins |
84 |
Published |
1998 |
JESD-609 Code |
e0 |
Pbfree Code |
no |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
2 |
Number of Terminations |
84 |
Terminal Finish |
Tin/Lead (Sn/Pb) |
Max Operating Temperature |
70°C |
Min Operating Temperature |
0°C |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
QUAD |
Terminal Form |
J BEND |
Peak Reflow Temperature (Cel) |
220 |
Supply Voltage |
5V |
Terminal Pitch |
1.27mm |
Frequency |
125MHz |
Time@Peak Reflow Temperature-Max (s) |
30 |
Pin Count |
84 |
Operating Supply Voltage |
5V |
Temperature Grade |
COMMERCIAL |
Max Supply Voltage |
5.25V |
Min Supply Voltage |
4.75V |
Number of I/O |
68 |
Memory Type |
EEPROM |
Propagation Delay |
10 ns |
Turn On Delay Time |
10 ns |
Frequency (Max) |
125MHz |
Programmable Logic Type |
EE PLD |
Number of Gates |
2500 |
Number of Programmable I/O |
68 |
Number of Logic Blocks (LABs) |
8 |
Speed Grade |
10 |
Output Function |
MACROCELL |
Number of Macro Cells |
128 |
JTAG BST |
NO |
In-System Programmable |
NO |
Length |
29.3116mm |
Width |
29.3116mm |
Radiation Hardening |
No |
RoHS Status |
RoHS Compliant |
Lead Free |
Contains Lead |
EPM7128ELC84-10 Overview
The mobile phone network has 128 macro cells, which are cells that provide radio coverage from high-power cell sites (towers, antennas, or masts).It is part of the PLCC package.As you can see, this device has 68 I/O ports programmed into it.It is programmed that device terminations will be 84 .The terminal position of this electrical part is QUAD, which serves as an important access point for passengers or freight.The power supply voltage is 5V.It is included in Programmable Logic Devices.84pins are programmed on the chip.It is possible to construct digital circuits using 2500gates, which are devices that serve as building blocks.If high efficiency is to be achieved, the supply voltage should be maintained at [0].EEPROM is adopted for storing data.This electronic part is mounted in the way of Surface Mount.There are 84 pins on the device.With a maximum supply voltage of [0], it operates.Initially, it requires a voltage of 4.75Vas the minimum supply voltage.A total of 68Programmable I/Os are present.In this case, 125MHzis the frequency that can be achieved.In order to operate, the temperature should be higher than 0°C.Temperatures should not exceed 70°C.8logic blocks (LABs) make up this circuit.It is recommended that the maximum frequency is less than 0.A programmable logic type is classified as EE PLD.
EPM7128ELC84-10 Features
PLCC package
68 I/Os
84 pin count
84 pins
8 logic blocks (LABs)
EPM7128ELC84-10 Applications
There are a lot of Altera EPM7128ELC84-10 CPLDs applications.
- Software-Driven Hardware Configuration
- Code converters
- Digital systems
- ToR/Aggregation/Core Switch and Router
- Storage Cards and Storage Racks
- Boolean function generators
- Address decoders
- Multiple Clock Source Selection
- Random logic replacement
- Custom shift registers