EPM7128SLC84-10N
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Package / Case | PLCC |
| Number of Pins | 84 |
| Published | 1998 |
| JESD-609 Code | e2 |
| Pbfree Code | yes |
| Part Status | Discontinued |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 84 |
| ECCN Code | EAR99 |
| Terminal Finish | Matte Tin/Copper (Sn/Cu) |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Additional Feature | CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | J BEND |
| Peak Reflow Temperature (Cel) | 245 |
| Supply Voltage | 5V |
| Terminal Pitch | 1.27mm |
| Frequency | 100MHz |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Pin Count | 84 |
| Operating Supply Voltage | 5V |
| Temperature Grade | COMMERCIAL |
| Max Supply Voltage | 5.25V |
| Min Supply Voltage | 4.75V |
| Number of I/O | 68 |
| Memory Type | EEPROM |
| Propagation Delay | 10 ns |
| Turn On Delay Time | 10 ns |
| Frequency (Max) | 147.1MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 2500 |
| Number of Programmable I/O | 68 |
| Number of Logic Blocks (LABs) | 8 |
| Speed Grade | 10 |
| Output Function | MACROCELL |
| Number of Macro Cells | 128 |
| JTAG BST | YES |
| In-System Programmable | YES |
| Height | 3.81mm |
| Length | 29.31mm |
| Width | 29.31mm |
| Radiation Hardening | No |
| RoHS Status | RoHS Compliant |
| Lead Free | Lead Free |
EPM7128SLC84-10N Overview
The mobile phone network has 128 macro cells, which are cells that provide radio coverage from high-power cell sites (towers, antennas, or masts).The item is enclosed in a PLCC package.There are 68 I/Os programmed in it.84terminations are programmed into the device.There is a QUADterminal position on the electrical part in question.Power is supplied by a voltage of 5V volts.This part is in the family [0].A chip with 84pins is programmed.When using this device, CONFIGURABLE I/O OPERATION WITH 3.3V OR 5Vcan also be found.As a building block for digital circuits, there are 2500gates.In order to achieve high efficiency, the supply voltage should be maintained at [0].For storing data, it is recommended to use [0].In this case, it is mounted by Surface Mount.84pins are included in its design.There is a maximum supply voltage of 5.25Vwhen the device is operating.A minimum supply voltage of 4.75V is required for it to operate.A programmable I/O count of 68 has been recorded.There is a maximum frequency of 100MHz.It is recommended that the operating temperature be higher than 0°C.Temperatures should be lower than 70°C when operating.The system consists of 8 logic blocks (LABs).It should be below 147.1MHzat the maximal frequency.This kind of FPGA is composed of EE PLD.
EPM7128SLC84-10N Features
PLCC package
68 I/Os
84 pin count
84 pins
8 logic blocks (LABs)
EPM7128SLC84-10N Applications
There are a lot of Altera EPM7128SLC84-10N CPLDs applications.
- Power Meter SMPS
- Network Interface Card (NIC) and Host Bus Adapter (HBA)
- Power up sequencing
- Portable digital devices
- Auxiliary Power Supply Isolated and Non-isolated
- Programmable power management
- Address decoding
- USB Bus
- Digital systems
- Bootloaders for FPGAs
