Parameters |
Supply Voltage |
5V |
Terminal Pitch |
1.27mm |
Frequency |
166.7MHz |
Time@Peak Reflow Temperature-Max (s) |
30 |
Pin Count |
84 |
Power Supplies |
3.3/55V |
Temperature Grade |
COMMERCIAL |
Max Supply Voltage |
3.6V |
Min Supply Voltage |
3V |
Number of I/O |
68 |
Memory Type |
EEPROM |
Propagation Delay |
6 ns |
Turn On Delay Time |
6 ns |
Frequency (Max) |
147.1MHz |
Programmable Logic Type |
EE PLD |
Number of Gates |
2500 |
Number of Programmable I/O |
68 |
Number of Logic Blocks (LABs) |
8 |
Speed Grade |
6 |
Output Function |
MACROCELL |
Number of Macro Cells |
128 |
JTAG BST |
YES |
In-System Programmable |
YES |
Radiation Hardening |
No |
RoHS Status |
RoHS Compliant |
Lead Free |
Contains Lead |
Factory Lead Time |
1 Week |
Mount |
Surface Mount |
Package / Case |
PLCC |
Number of Pins |
84 |
Published |
1998 |
JESD-609 Code |
e0 |
Pbfree Code |
no |
Part Status |
Discontinued |
Moisture Sensitivity Level (MSL) |
2 |
Number of Terminations |
84 |
Terminal Finish |
Tin/Lead (Sn/Pb) |
Max Operating Temperature |
70°C |
Min Operating Temperature |
0°C |
Additional Feature |
CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
QUAD |
Terminal Form |
J BEND |
Peak Reflow Temperature (Cel) |
220 |
EPM7128SLC84-6 Overview
There are 128 macro cells, which are cells in a mobile phone network that provides radio coverage served by a high-power cell site (tower, antenna or mast).It is embedded in the PLCC package.The device is programmed with 68 I/O ports.Terminations of devices are set to [0].As the terminal position of this electrical part is [0], it serves as an important access point for passengers or freight.A voltage of 5Vprovides power to the device.The part belongs to Programmable Logic Devices family.84pins are programmed on the chip.This device is also capable of displaying [0].2500gates are devices that serve as building blocks for digital circuits.For data storage, EEPROMis adopted.Surface Mountis the mounting point of this electronic part.The 84pins are designed into the board.It operates with the maximal supply voltage of 3.6V.Normally, it operates with a voltage of 3VV as its minimum supply voltage.In order for the device to operate, it requires 3.3/55V power supplies.A total of 68 Programmable I/Os are available.The frequency that can be achieved is 166.7MHz.The operating temperature should be higher than 0°C.It is recommended that the operating temperature be lower than 70°C.It consists of 8 logic blocks (LABs).There should be a lower maximum frequency than 147.1MHz.A programmable logic type is categorized as EE PLD.
EPM7128SLC84-6 Features
PLCC package
68 I/Os
84 pin count
84 pins
3.3/55V power supplies
8 logic blocks (LABs)
EPM7128SLC84-6 Applications
There are a lot of Altera EPM7128SLC84-6 CPLDs applications.
- Synchronous or asynchronous mode
- Timing control
- Random logic replacement
- Wide Vin Industrial low power SMPS
- SUPERVISORY FUNCTION (LVD AND WATCHDOG)
- ON-CHIP OSCILLATOR CIRCUIT
- Software-Driven Hardware Configuration
- USB Bus
- ROM patching
- STANDARD SERIAL INTERFACE UART