Parameters |
Mounting Type |
Surface Mount |
Package / Case |
84-LCC (J-Lead) |
Surface Mount |
YES |
Operating Temperature |
0°C~70°C TA |
Packaging |
Tray |
Series |
MAX® 7000S |
JESD-609 Code |
e0 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
Number of Terminations |
84 |
Additional Feature |
CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
QUAD |
Terminal Form |
J BEND |
Peak Reflow Temperature (Cel) |
220 |
Supply Voltage |
5V |
Terminal Pitch |
1.27mm |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
EPM7128 |
Qualification Status |
Not Qualified |
Supply Voltage-Max (Vsup) |
5.25V |
Power Supplies |
3.3/55V |
Supply Voltage-Min (Vsup) |
4.75V |
Programmable Type |
In System Programmable |
Number of I/O |
68 |
Clock Frequency |
166.7MHz |
Propagation Delay |
6 ns |
Number of Gates |
2500 |
Output Function |
MACROCELL |
Number of Macro Cells |
128 |
JTAG BST |
YES |
Voltage Supply - Internal |
4.75V~5.25V |
Delay Time tpd(1) Max |
6ns |
Number of Logic Elements/Blocks |
8 |
Length |
29.3116mm |
Width |
29.3116mm |
RoHS Status |
Non-RoHS Compliant |
EPM7128SLC84-6 Overview
There are 128 macro cells, which are cells in a mobile phone network that provides radio coverage served by a high-power cell site (tower, antenna or mast).You can find it in package [0].As a result, it has 68 I/O ports programmed.There are 84 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line.Its terminal position is QUAD.The device is powered by a voltage of 5V volts.It belongs to the family [0].The chip should be packaged by Tray.In order to ensure the reliability of the device, it is designed to operate at a temperature of [0].It is recommended that Surface Mountholds the chip in place.This type of FPGA is a part of the MAX? 7000S series.This device also displays [0].The EPM7128shows its related parts.In digital circuits, 2500gates serve as building blocks.A total of 8logic elements/blocks are present.In order for the device to operate, it requires 3.3/55V power supplies.In this case, the maximum supply voltage (Vsup) is 5.25V.Voltage supply (Vsup) should be higher than 4.75V.Its clock frequency should not exceed 166.7MHz.
EPM7128SLC84-6 Features
84-LCC (J-Lead) package
68 I/Os
The operating temperature of 0°C~70°C TA
3.3/55V power supplies
EPM7128SLC84-6 Applications
There are a lot of Intel EPM7128SLC84-6 CPLDs applications.
- Power up sequencing
- Custom state machines
- Software Configuration of Add-In Boards
- TIMERS/COUNTERS
- Boolean function generators
- Cross-Matrix Switch
- POWER-SAVING MODES
- Discrete logic functions
- Interface bridging
- Network Interface Card (NIC) and Host Bus Adapter (HBA)