EPM7128SLC84-7
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 84-LCC (J-Lead) |
| Surface Mount | YES |
| Operating Temperature | 0°C~70°C TA |
| Packaging | Tray |
| Series | MAX® 7000S |
| JESD-609 Code | e0 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 84 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Additional Feature | CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | J BEND |
| Peak Reflow Temperature (Cel) | 220 |
| Supply Voltage | 5V |
| Terminal Pitch | 1.27mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | EPM7128 |
| Qualification Status | Not Qualified |
| Supply Voltage-Max (Vsup) | 5.25V |
| Power Supplies | 3.3/55V |
| Supply Voltage-Min (Vsup) | 4.75V |
| Programmable Type | In System Programmable |
| Number of I/O | 68 |
| Clock Frequency | 166.7MHz |
| Propagation Delay | 7.5 ns |
| Number of Gates | 2500 |
| Output Function | MACROCELL |
| Number of Macro Cells | 128 |
| JTAG BST | YES |
| Voltage Supply - Internal | 4.75V~5.25V |
| Delay Time tpd(1) Max | 7.5ns |
| Number of Logic Elements/Blocks | 8 |
| Length | 29.3116mm |
| Width | 29.3116mm |
| RoHS Status | Non-RoHS Compliant |
EPM7128SLC84-7 Overview
Currently, there are 128 macro cells, which are low-power cell sites (towers, antennas, masts) that serve as radio coverage.84-LCC (J-Lead)is the package in which it resides.As you can see, this device has 68 I/O ports programmed into it.Devices are programmed with terminations of [0].As the terminal position of this electrical part is [0], it serves as an important access point for passengers and freight.A voltage of 5Vprovides power to the device.It is a part of the family [0].It is packaged in the way of Tray.To ensure its reliability, the operating temperature is set to [0].Mount the chip by Surface Mount.This type of FPGA is a part of the MAX? 7000S series.This device also displays [0].In accordance with the [0], its related parts are listed.There are 2500 gates, which are devices that acts as a building block for digital circuits. This logic element/block contains 8logic elements.There is 3.3/55V power supply available for it.In order to ensure proper operation, a maximum supply voltage (Vsup) of 5.25V is required.If the supply voltage (Vsup) is greater than 4.75V, then the device will work properly.It is recommended that the clock frequency not exceed 166.7MHz.
EPM7128SLC84-7 Features
84-LCC (J-Lead) package
68 I/Os
The operating temperature of 0°C~70°C TA
3.3/55V power supplies
EPM7128SLC84-7 Applications
There are a lot of Intel EPM7128SLC84-7 CPLDs applications.
- Digital designs
- Parity generators
- Multiple Clock Source Selection
- Software-Driven Hardware Configuration
- Software Configuration of Add-In Boards
- Multiple DIP Switch Replacement
- Digital systems
- ON-CHIP OSCILLATOR CIRCUIT
- Boolean function generators
- ROM patching
