EPM7128SLI84-10
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Mount | Surface Mount |
| Package / Case | PLCC |
| Number of Pins | 84 |
| Published | 1998 |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Part Status | Discontinued |
| Moisture Sensitivity Level (MSL) | 2 |
| Number of Terminations | 84 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Max Operating Temperature | 85°C |
| Min Operating Temperature | -40°C |
| Additional Feature | CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | J BEND |
| Peak Reflow Temperature (Cel) | 220 |
| Supply Voltage | 5V |
| Terminal Pitch | 1.27mm |
| Frequency | 125MHz |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 84 |
| Operating Supply Voltage | 5V |
| Temperature Grade | INDUSTRIAL |
| Max Supply Voltage | 5.5V |
| Min Supply Voltage | 4.5V |
| Number of I/O | 68 |
| Memory Type | EEPROM |
| Propagation Delay | 10 ns |
| Turn On Delay Time | 10 ns |
| Frequency (Max) | 147.1MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 2500 |
| Number of Programmable I/O | 68 |
| Number of Logic Blocks (LABs) | 8 |
| Speed Grade | 10 |
| Output Function | MACROCELL |
| Number of Macro Cells | 128 |
| JTAG BST | YES |
| In-System Programmable | YES |
| Length | 29.3116mm |
| Width | 29.3116mm |
| Radiation Hardening | No |
| RoHS Status | RoHS Compliant |
| Lead Free | Contains Lead |
EPM7128SLI84-10 Overview
There are 128 macro cells, which are cells in a mobile phone network that provides radio coverage served by a high-power cell site (tower, antenna or mast).The item is packaged with PLCC.There are 68 I/Os on the board.There is a 84terminations set on devices.The terminal position of this electrical part is QUAD, which serves as an important access point for passengers or freight.Power is provided by a supply voltage of 5V volts.This part is included in Programmable Logic Devices.It is equipped with 84 pin count.This device is also capable of displaying [0].A digital circuit can be constructed using 2500gates.In order to achieve high efficiency, the supply voltage should be maintained at [0].It is adopted to store data in [0].In this case, it is mounted by Surface Mount.It is designed with 84 pins.A maximum voltage of 5.5Vis required for operation.Normally, it operates with a voltage of 4.5VV as its minimum supply voltage.A total of 68 Programmable I/Os are available.There is a maximum frequency of 125MHz.It is recommended that the operating temperature be higher than -40°C.Ideally, the operating temperature should be below 85°C.In total, it contains 8 logic blocks (LABs).It is recommended that the maximum frequency is less than 0.In programmable logic, a type of logic can be categorized as EE PLD.
EPM7128SLI84-10 Features
PLCC package
68 I/Os
84 pin count
84 pins
8 logic blocks (LABs)
EPM7128SLI84-10 Applications
There are a lot of Altera EPM7128SLI84-10 CPLDs applications.
- Address decoders
- Programmable polarity
- ON-CHIP OSCILLATOR CIRCUIT
- Digital systems
- Power up sequencing
- Dedicated input registers
- Storage Cards and Storage Racks
- State machine control
- Page register
- TIMERS/COUNTERS
