Parameters |
Mount |
Surface Mount |
Package / Case |
PQFP |
Number of Pins |
100 |
Published |
1998 |
JESD-609 Code |
e3 |
Pbfree Code |
yes |
Moisture Sensitivity Level (MSL) |
3 |
Number of Terminations |
100 |
ECCN Code |
EAR99 |
Terminal Finish |
MATTE TIN (472) OVER COPPER |
Max Operating Temperature |
70°C |
Min Operating Temperature |
0°C |
Technology |
CMOS |
Terminal Position |
QUAD |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
245 |
Supply Voltage |
5V |
Terminal Pitch |
0.65mm |
Frequency |
125MHz |
Time@Peak Reflow Temperature-Max (s) |
40 |
Pin Count |
100 |
Qualification Status |
Not Qualified |
Operating Supply Voltage |
5V |
Temperature Grade |
COMMERCIAL |
Max Supply Voltage |
5.25V |
Min Supply Voltage |
4.75V |
Number of I/O |
84 |
Memory Type |
EEPROM |
Propagation Delay |
10 ns |
Turn On Delay Time |
10 ns |
Frequency (Max) |
100MHz |
Programmable Logic Type |
EE PLD |
Number of Logic Blocks (LABs) |
8 |
Speed Grade |
10 |
Output Function |
MACROCELL |
Height Seated (Max) |
3.65mm |
Length |
20mm |
Width |
14mm |
RoHS Status |
RoHS Compliant |
EPM7128SQC100-10FN Overview
PQFPis the package in which it resides.In this case, there are 84 I/Os programmed.It is programmed that device terminations will be 100 .As the terminal position of this electrical part is [0], it serves as an important access point for passengers and freight.It is powered by a voltage of 5V volts.There are 100pins on the chip.Optimal efficiency requires a supply voltage of [0].For storing data, it is recommended to use [0].This device is mounted by Surface Mount.100pins are included in its design.In this case, the maximum supply voltage is 5.25V.The minimal supply voltage is 4.75V.This can be achieved at a frequency of 125MHz.Operating temperatures should be higher than 0°C.Temperatures should be lower than 70°C when operating.There are 8 logic blocks (LABs) in its basic building block.It is recommended that the maximum frequency is less than 0.In programmable logic, a type of logic can be categorized as EE PLD.
EPM7128SQC100-10FN Features
PQFP package
84 I/Os
100 pin count
100 pins
8 logic blocks (LABs)
EPM7128SQC100-10FN Applications
There are a lot of Altera EPM7128SQC100-10FN CPLDs applications.
- POWER-SAVING MODES
- Bootloaders for FPGAs
- Code converters
- Field programmable gate
- Protection relays
- Address decoders
- Software Configuration of Add-In Boards
- D/T registers and latches
- SFP, QSFP, QSFP-DD, OSFP, Mini-SAS HD Port Management
- ANALOG-TO-DIGITAL CONVERTOR (ADC)