Parameters |
Mount |
Surface Mount |
Package / Case |
PQFP |
Number of Pins |
160 |
Published |
1998 |
JESD-609 Code |
e0 |
Pbfree Code |
no |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
3 |
Number of Terminations |
160 |
Terminal Finish |
Tin/Lead (Sn/Pb) |
Max Operating Temperature |
70°C |
Min Operating Temperature |
0°C |
Additional Feature |
CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
QUAD |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
220 |
Supply Voltage |
5V |
Terminal Pitch |
0.65mm |
Frequency |
166.7MHz |
Time@Peak Reflow Temperature-Max (s) |
30 |
Pin Count |
160 |
Qualification Status |
Not Qualified |
Operating Supply Voltage |
5V |
Temperature Grade |
COMMERCIAL |
Max Supply Voltage |
5.25V |
Min Supply Voltage |
4.75V |
Number of I/O |
100 |
Memory Type |
EEPROM |
Propagation Delay |
6 ns |
Turn On Delay Time |
6 ns |
Frequency (Max) |
147.1MHz |
Programmable Logic Type |
EE PLD |
Number of Gates |
2500 |
Number of Programmable I/O |
100 |
Number of Logic Blocks (LABs) |
8 |
Output Function |
MACROCELL |
Number of Macro Cells |
128 |
JTAG BST |
YES |
In-System Programmable |
YES |
Height Seated (Max) |
4.07mm |
RoHS Status |
RoHS Compliant |
EPM7128SQC160-6 Overview
The mobile phone network has 128 macro cells, which are cells that provide radio coverage from high-power cell sites (towers, antennas, or masts).It is contained in package [0].As a result, it has 100 I/O ports programmed.Devices are programmed with terminations of [0].This electrical part has a terminal position of QUADand is connected to the ground.The power supply voltage is 5V.The part is included in Programmable Logic Devices.With 160pins programmed, the chip is ready to use.The device can also be used to find [0].A digital circuit is built using 2500gates.In order to achieve high efficiency, the supply voltage should be maintained at [0].It is recommended that data be stored in [0].This electronic part is mounted in the way of Surface Mount.160pins are included in its design.This device operates at a voltage of 5.25V when the maximum supply voltage is applied.A minimum supply voltage of 4.75V is required for this device to operate.A programmable I/O count of 100 has been recorded.It is possible to achieve a frequency of 166.7MHz.It is recommended that the operating temperature exceed 0°C.There should be a temperature below 70°Cat the time of operation.The system consists of 8 logic blocks (LABs).The maximal frequency should be lower than 147.1MHz.A programmable logic type is classified as EE PLD.
EPM7128SQC160-6 Features
PQFP package
100 I/Os
160 pin count
160 pins
8 logic blocks (LABs)
EPM7128SQC160-6 Applications
There are a lot of Altera EPM7128SQC160-6 CPLDs applications.
- INTERRUPT SYSTEM
- Random logic replacement
- Field programmable gate
- Parity generators
- Configurable Addressing of I/O Boards
- Timing control
- Multiple Clock Source Selection
- PLC analog input modules
- High speed graphics processing
- Code converters