EPM7160ELI84-20
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Package / Case | PLCC |
| Number of Pins | 84 |
| Published | 1998 |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 2 |
| Number of Terminations | 84 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Max Operating Temperature | 85°C |
| Min Operating Temperature | -40°C |
| Additional Feature | CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
| HTS Code | 8542.39.00.01 |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | J BEND |
| Peak Reflow Temperature (Cel) | 220 |
| Supply Voltage | 5V |
| Terminal Pitch | 1.27mm |
| Frequency | 83.33MHz |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 84 |
| Operating Supply Voltage | 5V |
| Temperature Grade | INDUSTRIAL |
| Max Supply Voltage | 5.5V |
| Min Supply Voltage | 4.5V |
| Number of I/O | 64 |
| Memory Type | EEPROM |
| Propagation Delay | 20 ns |
| Turn On Delay Time | 20 ns |
| Frequency (Max) | 100MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 3200 |
| Number of Programmable I/O | 64 |
| Number of Logic Blocks (LABs) | 10 |
| Speed Grade | 20 |
| Output Function | MACROCELL |
| Number of Macro Cells | 160 |
| JTAG BST | NO |
| In-System Programmable | NO |
| Height | 3.81mm |
| Length | 29.31mm |
| Width | 29.31mm |
| Radiation Hardening | No |
| RoHS Status | RoHS Compliant |
| Lead Free | Contains Lead |
EPM7160ELI84-20 Overview
There are 160 macro cells, which provide radio coverage via high-power cell towers, antennas or masts in a mobile phone network.The item is enclosed in a PLCC package.As a result, it has 64 I/O ports programmed.84terminations are programmed into the device.The terminal position of this electrical component is QUAD.A voltage of 5Vprovides power to the device.The part belongs to Programmable Logic Devices family.There are 84pins on the chip.This device is also capable of displaying [0].It is possible to construct digital circuits using 3200gates, which are devices that serve as building blocks.In order to achieve high efficiency, the supply voltage should be maintained at [0].EEPROM is adopted for storing data.A Surface Mountis mounted on this electronic component.It is designed with 84 pins.This device operates at a voltage of 5.5Vas its maximum supply voltage.Normally, it operates with a voltage of 4.5VV as its minimum supply voltage.There are a total of 64 Programmable I/Os.The frequency that can be achieved is 83.33MHz.Operating temperatures should be higher than 0°C.The operating temperature should be lower than 85°C.It consists of 10 logic blocks (LABs).It should be below 100MHzat the maximal frequency.In programmable logic, a type of logic can be categorized as EE PLD.
EPM7160ELI84-20 Features
PLCC package
64 I/Os
84 pin count
84 pins
10 logic blocks (LABs)
EPM7160ELI84-20 Applications
There are a lot of Altera EPM7160ELI84-20 CPLDs applications.
- Programmable power management
- STANDARD SERIAL INTERFACE UART
- Timing control
- DDC INTERFACE
- LED Lighting systems
- SUPERVISORY FUNCTION (LVD AND WATCHDOG)
- Handheld digital devices
- State machine design
- Address decoding
- I2C BUS INTERFACE
