EPM7160SLC84-6
| Parameters | |
|---|---|
| Temperature Grade | COMMERCIAL |
| Max Supply Voltage | 5.25V |
| Min Supply Voltage | 4.75V |
| Number of I/O | 64 |
| Memory Type | EEPROM |
| Propagation Delay | 6 ns |
| Turn On Delay Time | 6 ns |
| Frequency (Max) | 149.3MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 3200 |
| Number of Programmable I/O | 64 |
| Number of Logic Blocks (LABs) | 10 |
| Speed Grade | 6 |
| Output Function | MACROCELL |
| Number of Macro Cells | 160 |
| JTAG BST | YES |
| In-System Programmable | YES |
| Height Seated (Max) | 5.08mm |
| Radiation Hardening | No |
| RoHS Status | RoHS Compliant |
| Lead Free | Contains Lead |
| Mount | Surface Mount |
| Package / Case | PLCC |
| Number of Pins | 84 |
| Packaging | Bulk |
| Published | 1998 |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Part Status | Discontinued |
| Moisture Sensitivity Level (MSL) | 2 |
| Number of Terminations | 84 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| HTS Code | 8542.39.00.01 |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | J BEND |
| Peak Reflow Temperature (Cel) | 220 |
| Supply Voltage | 5V |
| Terminal Pitch | 1.27mm |
| Frequency | 166.7MHz |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 84 |
| Operating Supply Voltage | 5V |
EPM7160SLC84-6 Overview
There are 160 macro cells, which are cells in a mobile phone network that provides radio coverage served by a high-power cell site (tower, antenna or mast).A PLCC package contains the item.The device has 64inputs and outputs.It is programmed to terminate devices at [0].This electrical part has a terminal position of [0], which serves as an important point of access for passengers and freight.The power source is powered by 5Vvolts.There is a part in the family [0].It is packaged in the way of Bulk.There are 84pins on the chip.3200gates are devices that serve as building blocks for digital circuits.If high efficiency is desired, the supply voltage should be kept at [0].In general, it is recommended to store data in [0].Surface Mountmounts this electronic component.There are 84 pins on the device.It operates with the maximal supply voltage of 5.25V.Despite its minimal supply voltage of [0], it is capable of operating.There are a total of 64 Programmable I/Os.There is 166.7MHz frequency that can be achieved.In order to operate properly, the operating temperature should be higher than 0°C.Temperatures should be lower than 70°C when operating.It is composed of 10 logic blocks (LABs).It is recommended that the maximal frequency be less than 0.It is possible to classify programmable logic as EE PLD.
EPM7160SLC84-6 Features
PLCC package
64 I/Os
84 pin count
84 pins
10 logic blocks (LABs)
EPM7160SLC84-6 Applications
There are a lot of Altera EPM7160SLC84-6 CPLDs applications.
- ANALOG-TO-DIGITAL CONVERTOR (ADC)
- DMA control
- Portable digital devices
- High speed graphics processing
- Reset swapping
- LED Lighting systems
- Power automation
- Software-driven hardware configuration
- Address decoding
- Wireless Infrastructure Base Band Unit and Remote Radio Unit
