EPM7192EGI160-20
| Parameters | |
|---|---|
| Mount | Surface Mount, Through Hole |
| Number of Pins | 160 |
| Published | 1998 |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Moisture Sensitivity Level (MSL) | 1 |
| Number of Terminations | 160 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Max Operating Temperature | 85°C |
| Min Operating Temperature | -40°C |
| Additional Feature | CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
| HTS Code | 8542.39.00.01 |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | PERPENDICULAR |
| Terminal Form | PIN/PEG |
| Peak Reflow Temperature (Cel) | 220 |
| Supply Voltage | 5V |
| Terminal Pitch | 2.54mm |
| Frequency | 83.33MHz |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 160 |
| Operating Supply Voltage | 5V |
| Temperature Grade | INDUSTRIAL |
| Max Supply Voltage | 5.5V |
| Min Supply Voltage | 4.5V |
| Number of I/O | 124 |
| Memory Type | EEPROM |
| Propagation Delay | 20 ns |
| Turn On Delay Time | 20 ns |
| Frequency (Max) | 90.9MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 3750 |
| Number of Programmable I/O | 124 |
| Number of Logic Blocks (LABs) | 12 |
| Speed Grade | 20 |
| Output Function | MACROCELL |
| Number of Macro Cells | 192 |
| JTAG BST | NO |
| In-System Programmable | NO |
| Height Seated (Max) | 5.34mm |
| Length | 39.624mm |
| Width | 39.624mm |
| Radiation Hardening | No |
| RoHS Status | RoHS Compliant |
| Lead Free | Contains Lead |
EPM7192EGI160-20 Overview
192 macrocells are present in the mobile phone network, which offer radio coverage from a high-power cell tower, antenna, or mast.It is programmed with 124 I/Os.Terminations of devices are set to [0].There is a PERPENDICULARterminal position on the electrical part in question.A voltage of 5Vprovides power to the device.It belongs to the family [0].There are 160 pins on the chip.When using this device, CONFIGURABLE I/O OPERATION WITH 3.3V OR 5Vcan also be found.For digital circuits, there are 3750gates. These devices serve as building blocks.The supply voltage should be maintained at 5V for high efficiency.For data storage, EEPROMis adopted.This device is mounted by Surface Mount, Through Hole.160pins are included in its design.In this case, the maximum supply voltage is 5.5V.Normally, it operates with a voltage of 4.5VV as its minimum supply voltage.There are 124 Programmable I/Os.It is possible to achieve a frequency of 83.33MHz.Ideally, the operating temperature should be greater than -40°C.A temperature below 85°Cshould be used as the operating temperature.The program consists of 12 logic blocks (LABs).The maximum frequency should not exceed 90.9MHz.There are several types of programmable logic that can be categorized as EE PLD.
EPM7192EGI160-20 Features
124 I/Os
160 pin count
160 pins
12 logic blocks (LABs)
EPM7192EGI160-20 Applications
There are a lot of Altera EPM7192EGI160-20 CPLDs applications.
- Address decoding
- Complex programmable logic devices
- TIMERS/COUNTERS
- Timing control
- Programmable polarity
- Storage Cards and Storage Racks
- Auxiliary Power Supply Isolated and Non-isolated
- Dedicated input registers
- Field programmable gate
- ANALOG-TO-DIGITAL CONVERTOR (ADC)
