EPM7192EQI160-20
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Mount | Surface Mount |
| Package / Case | PQFP |
| Number of Pins | 160 |
| Published | 1998 |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 160 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Max Operating Temperature | 85°C |
| Min Operating Temperature | -40°C |
| Additional Feature | CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
| HTS Code | 8542.39.00.01 |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 220 |
| Supply Voltage | 5V |
| Terminal Pitch | 0.65mm |
| Frequency | 83.33MHz |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 160 |
| Operating Supply Voltage | 5V |
| Temperature Grade | INDUSTRIAL |
| Max Supply Voltage | 5.5V |
| Min Supply Voltage | 4.5V |
| Number of I/O | 124 |
| Memory Type | EEPROM |
| Propagation Delay | 20 ns |
| Turn On Delay Time | 20 ns |
| Frequency (Max) | 90.9MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 3750 |
| Number of Programmable I/O | 124 |
| Number of Logic Blocks (LABs) | 12 |
| Speed Grade | 20 |
| Output Function | MACROCELL |
| Number of Macro Cells | 192 |
| JTAG BST | NO |
| In-System Programmable | NO |
| Height Seated (Max) | 4.07mm |
| Length | 28mm |
| Width | 28mm |
| Radiation Hardening | No |
| RoHS Status | RoHS Compliant |
EPM7192EQI160-20 Overview
In the mobile phone network, there are 192macro cells, which are cells with high-power antennas and towers.You can find it in package [0].In this case, there are 124 I/Os programmed.160terminations are programmed into the device.This electrical component has a terminal position of 0.Power is provided by a supply voltage of 5V volts.There is a part included in Programmable Logic Devices.There are 160pins on the chip.When using this device, CONFIGURABLE I/O OPERATION WITH 3.3V OR 5Vcan also be found.A digital circuit is built using 3750gates.It is recommended that the supply voltage be kept at 5Vto maximize efficiency.EEPROM is adopted for storing data.In this case, it is mounted by Surface Mount.160pins are included in its design.A maximum supply voltage of 5.5Vis used in its operation.Despite its minimal supply voltage of [0], it is capable of operating.A total of 124programmable I/Os are available.The frequency that can be achieved is 83.33MHz.It is recommended that the operating temperature exceed -40°C.A temperature less than 85°Cshould be used for operation.The program consists of 12 logic blocks (LABs).The maximum frequency should not exceed 90.9MHz.It is possible to classify programmable logic as EE PLD.
EPM7192EQI160-20 Features
PQFP package
124 I/Os
160 pin count
160 pins
12 logic blocks (LABs)
EPM7192EQI160-20 Applications
There are a lot of Altera EPM7192EQI160-20 CPLDs applications.
- I/O PORTS (MCU MODULE)
- Voltage level translation
- Preset swapping
- Dedicated input registers
- DDC INTERFACE
- Programmable polarity
- State machine control
- Configurable Addressing of I/O Boards
- Software-driven hardware configuration
- Digital multiplexers
