Parameters |
Power Supplies |
2.5/3.33.3V |
Supply Voltage-Min (Vsup) |
3V |
Programmable Type |
In System Programmable |
Number of I/O |
120 |
Clock Frequency |
126.6MHz |
Propagation Delay |
7.5 ns |
Number of Gates |
5000 |
Output Function |
MACROCELL |
Number of Macro Cells |
256 |
JTAG BST |
YES |
Voltage Supply - Internal |
3V~3.6V |
Delay Time tpd(1) Max |
7.5ns |
Number of Logic Elements/Blocks |
16 |
Height Seated (Max) |
1.6mm |
Length |
20mm |
Width |
20mm |
RoHS Status |
RoHS Compliant |
Factory Lead Time |
1 Week |
Mounting Type |
Surface Mount |
Package / Case |
144-LQFP |
Surface Mount |
YES |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tray |
Series |
MAX® 7000A |
JESD-609 Code |
e3 |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
Number of Terminations |
144 |
ECCN Code |
3A991 |
Terminal Finish |
Matte Tin (Sn) |
Additional Feature |
YES |
HTS Code |
8542.39.00.01 |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
QUAD |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
250 |
Supply Voltage |
3.3V |
Terminal Pitch |
0.5mm |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
EPM7256 |
JESD-30 Code |
S-PQFP-G144 |
Qualification Status |
Not Qualified |
Supply Voltage-Max (Vsup) |
3.6V |
EPM7256AETI144-7N Overview
Currently, there are 256 macro cells, which are low-power cell sites (towers, antennas, masts) that serve as radio coverage.The item is packaged with 144-LQFP.In this case, there are 120 I/Os programmed.It is programmed that device terminations will be 144 .This electrical component has a terminal position of 0.The device is powered by a voltage of 3.3V volts.This part is part of the family [0].It is recommended that the chip be packaged by Tray.The operating temperature of the machine is -40°C~85°C TA to ensure its reliability.It is mounted in the way of Surface Mount.In this case, it is a type of FPGA belonging to the MAX? 7000A series.This device can also display [0].The EPM7256shows its related parts.A digital circuit is built using 5000gates.There are 16 logic elements/blocks.It operates from 2.5/3.33.3V power supplies.The maximal supply voltage (Vsup) reaches 3.6V.Voltage supply (Vsup) should be higher than 3V.The clock frequency should not exceed 126.6MHz.
EPM7256AETI144-7N Features
144-LQFP package
120 I/Os
The operating temperature of -40°C~85°C TA
2.5/3.33.3V power supplies
EPM7256AETI144-7N Applications
There are a lot of Intel EPM7256AETI144-7N CPLDs applications.
- Software-driven hardware configuration
- Interface bridging
- Custom shift registers
- STANDARD SERIAL INTERFACE UART
- Network Interface Card (NIC) and Host Bus Adapter (HBA)
- Complex programmable logic devices
- Discrete logic functions
- D/T registers and latches
- Power up sequencing
- Multiple DIP Switch Replacement