EPM7256ERI208-20
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Mount | Surface Mount |
| Package / Case | QFP |
| Number of Pins | 208 |
| Published | 1998 |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Part Status | Discontinued |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 208 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Max Operating Temperature | 85°C |
| Min Operating Temperature | -40°C |
| Additional Feature | CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
| HTS Code | 8542.39.00.01 |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 220 |
| Supply Voltage | 5V |
| Terminal Pitch | 0.5mm |
| Frequency | 83.33MHz |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 208 |
| Operating Supply Voltage | 5V |
| Temperature Grade | INDUSTRIAL |
| Max Supply Voltage | 5.5V |
| Min Supply Voltage | 4.5V |
| Number of I/O | 164 |
| Memory Type | EEPROM |
| Propagation Delay | 20 ns |
| Turn On Delay Time | 20 ns |
| Frequency (Max) | 90.9MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 5000 |
| Number of Programmable I/O | 164 |
| Number of Logic Blocks (LABs) | 16 |
| Speed Grade | 20 |
| Output Function | MACROCELL |
| Number of Macro Cells | 256 |
| JTAG BST | NO |
| In-System Programmable | NO |
| Height Seated (Max) | 4.1mm |
| Length | 28mm |
| Width | 28mm |
| Radiation Hardening | No |
| RoHS Status | RoHS Compliant |
EPM7256ERI208-20 Overview
A mobile phone network consists of 256macro cells, which are radio coverage cells served by a high-power cell site (tower, antenna or mast).It is contained in package [0].The device has 164inputs and outputs.It is programmed to terminate devices at [0].This electrical part has a terminal position of QUADand is connected to the ground.Power is supplied by a voltage of 5V volts.It is included in Programmable Logic Devices.Chips are programmed with 208 pins.It is also possible to find CONFIGURABLE I/O OPERATION WITH 3.3V OR 5Vwhen using this device.As a building block for digital circuits, there are 5000gates.The supply voltage should be maintained at 5V for high efficiency.In this case, EEPROMwill be used to store the data.A Surface Mountis mounted on this electronic component.There are 208 pins on the device.It operates with the maximal supply voltage of 5.5V.With a minimal supply voltage of [0], it operates.A total of 164 Programmable I/Os are available.This frequency is 83.33MHz.It is recommended that the operating temperature be higher than -40°C.A temperature lower than 85°Cis recommended for operation.The system consists of 16 logic blocks (LABs).It is recommended that the maximum frequency is less than 0.A programmable logic type is classified as EE PLD.
EPM7256ERI208-20 Features
QFP package
164 I/Os
208 pin count
208 pins
16 logic blocks (LABs)
EPM7256ERI208-20 Applications
There are a lot of Altera EPM7256ERI208-20 CPLDs applications.
- Digital multiplexers
- High speed graphics processing
- Handheld digital devices
- Random logic replacement
- Power up sequencing
- State machine control
- DMA control
- Wide Vin Industrial low power SMPS
- Software Configuration of Add-In Boards
- Power automation
