EPM7256SRI208-10
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Mount | Surface Mount |
| Package / Case | PQFP |
| Number of Pins | 208 |
| Published | 1998 |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Part Status | Discontinued |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 208 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Max Operating Temperature | 85°C |
| Min Operating Temperature | -40°C |
| HTS Code | 8542.39.00.01 |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 220 |
| Supply Voltage | 5V |
| Terminal Pitch | 0.5mm |
| Frequency | 125MHz |
| Time@Peak Reflow Temperature-Max (s) | 20 |
| Pin Count | 208 |
| Operating Supply Voltage | 5V |
| Temperature Grade | INDUSTRIAL |
| Max Supply Voltage | 5.5V |
| Min Supply Voltage | 4.5V |
| Number of I/O | 164 |
| Memory Type | EEPROM |
| Propagation Delay | 10 ns |
| Turn On Delay Time | 10 ns |
| Frequency (Max) | 128.2MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 5000 |
| Number of Programmable I/O | 164 |
| Number of Logic Blocks (LABs) | 16 |
| Speed Grade | 10 |
| Output Function | MACROCELL |
| Number of Macro Cells | 256 |
| JTAG BST | YES |
| In-System Programmable | YES |
| Height Seated (Max) | 4.1mm |
| Length | 28mm |
| Width | 28mm |
| Radiation Hardening | No |
| RoHS Status | RoHS Compliant |
| Lead Free | Contains Lead |
EPM7256SRI208-10 Overview
256 macrocells are present in the mobile phone network, which offer radio coverage from a high-power cell tower, antenna, or mast.The item is enclosed in a PQFP package.The device is programmed with 164 I/O ports.There are 208 terminations programmed into the device.Its terminal position is QUAD.A voltage of 5V is used as the power supply for this device.The part belongs to Programmable Logic Devices family.There are 208 pins on the chip.A digital circuit can be constructed using 5000gates.It is recommended that the supply voltage be kept at 5Vto maximize efficiency.For data storage, EEPROMis adopted.Surface Mountis the mounting point of this electronic part.208pins are included in its design.This device operates at a voltage of 5.5V when the maximum supply voltage is applied.The device is designed to operate with a minimal supply voltage of 4.5VV.A total of 164 Programmable I/Os are available.There can be 125MHz frequency achieved.Operating temperatures should be higher than 0°C.The operating temperature should be lower than 85°C.There are 16logic blocks (LABs) that make up its basic building block.The maximum frequency should not exceed 128.2MHz.There is a type of programmable logic called EE PLD.
EPM7256SRI208-10 Features
PQFP package
164 I/Os
208 pin count
208 pins
16 logic blocks (LABs)
EPM7256SRI208-10 Applications
There are a lot of Altera EPM7256SRI208-10 CPLDs applications.
- Dedicated input registers
- ON-CHIP OSCILLATOR CIRCUIT
- I/O expansion
- Software-Driven Hardware Configuration
- Field programmable gate
- ANALOG-TO-DIGITAL CONVERTOR (ADC)
- Digital multiplexers
- ROM patching
- Digital systems
- Synchronous or asynchronous mode
