Parameters |
Mount |
Surface Mount |
Package / Case |
LCC |
Number of Pins |
84 |
Published |
1994 |
JESD-609 Code |
e0 |
Pbfree Code |
no |
Part Status |
Discontinued |
Moisture Sensitivity Level (MSL) |
3 |
Number of Terminations |
84 |
Terminal Finish |
Tin/Lead (Sn/Pb) |
Max Operating Temperature |
85°C |
Min Operating Temperature |
-40°C |
HTS Code |
8542.39.00.01 |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
QUAD |
Terminal Form |
J BEND |
Peak Reflow Temperature (Cel) |
220 |
Supply Voltage |
5V |
Terminal Pitch |
1.27mm |
Time@Peak Reflow Temperature-Max (s) |
30 |
Pin Count |
84 |
Qualification Status |
Not Qualified |
Supply Voltage-Max (Vsup) |
5.5V |
Power Supplies |
3.3/55V |
Temperature Grade |
INDUSTRIAL |
Supply Voltage-Min (Vsup) |
4.5V |
Number of I/O |
60 |
Clock Frequency |
144.9MHz |
Propagation Delay |
10.8 ns |
Programmable Logic Type |
EE PLD |
Number of Gates |
6000 |
Number of Logic Blocks (LABs) |
20 |
Output Function |
MACROCELL |
Number of Macro Cells |
320 |
JTAG BST |
YES |
In-System Programmable |
YES |
Height Seated (Max) |
5.08mm |
Length |
29.3116mm |
Width |
29.3116mm |
RoHS Status |
RoHS Compliant |
EPM9320ALI84-10 Overview
320 macrocells are present in the mobile phone network, which offer radio coverage from a high-power cell tower, antenna, or mast.It is contained in package [0].The device is programmed with 60 I/O ports.The device is programmed with 84 terminations.The terminal position of this electrical component is QUAD.The power source is powered by 5Vvolts.The part is included in Programmable Logic Devices.In this chip, the 84pins are programmed.As a building block for digital circuits, there are 6000gates.The electronic component is mounted by Surface Mount.The 84pins are designed into the board.It operates from 3.3/55V power supplies.In this case, the maximum supply voltage (Vsup) is 5.5V.Operating temperatures should be higher than 0°C.A temperature lower than 85°Cis recommended for operation.In total, it contains 20 logic blocks (LABs).In order to operate properly, the supply voltage (Vsup) should be greater than 4.5V.clock frequency should not exceed [0].In programmable logic, a type of logic can be categorized as EE PLD.
EPM9320ALI84-10 Features
LCC package
60 I/Os
84 pin count
84 pins
3.3/55V power supplies
20 logic blocks (LABs)
EPM9320ALI84-10 Applications
There are a lot of Altera EPM9320ALI84-10 CPLDs applications.
- Power Meter SMPS
- Software-driven hardware configuration
- D/T registers and latches
- Boolean function generators
- Protection relays
- Custom shift registers
- ON-CHIP OSCILLATOR CIRCUIT
- I/O PORTS (MCU MODULE)
- White goods (Washing, Cold, Aircon ,...)
- Digital multiplexers