Parameters |
Mount |
Surface Mount |
Published |
1994 |
JESD-609 Code |
e0 |
Pbfree Code |
no |
Part Status |
Discontinued |
Moisture Sensitivity Level (MSL) |
3 |
Number of Terminations |
208 |
Terminal Finish |
Tin/Lead (Sn/Pb) |
Max Operating Temperature |
85°C |
Min Operating Temperature |
-40°C |
Additional Feature |
484 FLIP FLOPS; CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
HTS Code |
8542.39.00.01 |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
QUAD |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
220 |
Supply Voltage |
5V |
Terminal Pitch |
0.5mm |
Reach Compliance Code |
unknown |
Time@Peak Reflow Temperature-Max (s) |
20 |
Pin Count |
208 |
Qualification Status |
Not Qualified |
Supply Voltage-Max (Vsup) |
5.5V |
Power Supplies |
3.3/55V |
Temperature Grade |
INDUSTRIAL |
Supply Voltage-Min (Vsup) |
4.5V |
Number of I/O |
132 |
Clock Frequency |
100MHz |
Propagation Delay |
23 ns |
Programmable Logic Type |
EE PLD |
Number of Gates |
6000 |
Number of Logic Blocks (LABs) |
20 |
Output Function |
MACROCELL |
Number of Macro Cells |
320 |
JTAG BST |
YES |
In-System Programmable |
YES |
Height Seated (Max) |
4.1mm |
Length |
28mm |
Width |
28mm |
RoHS Status |
RoHS Compliant |
EPM9320RI208-20 Overview
There are 320 macro cells. A macro cell is a cell in a mobile phone network that provides radio coverage through the use of a high-power cell site (tower, antenna or mast).The device is programmed with 132 I/Os.Devices are programmed with terminations of [0].The terminal position of this electrical component is QUAD.There is 5V voltage supply for this device.The part is included in Programmable Logic Devices.It is equipped with 208 pin count.Additionally, this device is capable of displaying [0].For digital circuits, there are 6000gates. These devices serve as building blocks.A Surface Mountis mounted on this electronic component.Currently, it is powered by 3.3/55Vsources.A maximum supply voltage (Vsup) of 5.5V is provided.The operating temperature should be higher than -40°C.It is recommended that the operating temperature be below 85°C.The program consists of 20 logic blocks (LABs).The supply voltage (Vsup) should be greater than 4.5V.A frequency of 100MHzshould not be exceeded by its clock.A programmable logic type can be categorized as EE PLD.
EPM9320RI208-20 Features
132 I/Os
208 pin count
3.3/55V power supplies
20 logic blocks (LABs)
EPM9320RI208-20 Applications
There are a lot of Altera EPM9320RI208-20 CPLDs applications.
- I2C BUS INTERFACE
- Multiple DIP Switch Replacement
- Wireless Infrastructure Base Band Unit and Remote Radio Unit
- I/O PORTS (MCU MODULE)
- Cross-Matrix Switch
- Custom shift registers
- INTERRUPT SYSTEM
- Bootloaders for FPGAs
- Software Configuration of Add-In Boards
- Portable digital devices