EPM9400RC208-15
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 208-BFQFP Exposed Pad |
| Surface Mount | YES |
| Operating Temperature | 0°C~70°C TA |
| Packaging | Tray |
| Series | MAX® 9000 |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 208 |
| Terminal Finish | TIN LEAD |
| Additional Feature | 580 FLIP FLOPS; CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 220 |
| Supply Voltage | 5V |
| Terminal Pitch | 0.5mm |
| Reach Compliance Code | unknown |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 208 |
| JESD-30 Code | S-PQFP-G208 |
| Qualification Status | COMMERCIAL |
| Supply Voltage-Min (Vsup) | 4.75V |
| Programmable Type | In System Programmable |
| Number of I/O | 139 |
| Clock Frequency | 117.6MHz |
| Propagation Delay | 16.2 ns |
| Number of Gates | 8000 |
| Output Function | MACROCELL |
| Number of Macro Cells | 400 |
| Voltage Supply - Internal | 4.75V~5.25V |
| Delay Time tpd(1) Max | 15ns |
| Number of Logic Elements/Blocks | 25 |
| Height Seated (Max) | 4.1mm |
| Length | 28mm |
| Width | 28mm |
| RoHS Status | Non-RoHS Compliant |
EPM9400RC208-15 Overview
There are 400 macro cells. A macro cell is a cell in a mobile phone network that provides radio coverage through the use of a high-power cell site (tower, antenna or mast).A 208-BFQFP Exposed Pad package contains the item.It is programmed with 139 I/Os.Devices are programmed with terminations of [0].This electrical part has a terminal position of [0], which serves as an important point of access for passengers and freight.It is powered by a voltage of 5V volts.It is recommended that the chip be packaged by Tray.The temperature at which it operates is set to 0°C~70°C TAin order to ensure its reliability.Chips should be mounted by Surface Mount.The MAX? 9000series FPGA is one of these types.It has 208pins programmed.When using this device, 580 FLIP FLOPS; CONFIGURABLE I/O OPERATION WITH 3.3V OR 5Vis also available.8000gates are used to construct digital circuits.This logic block consists of 25logic elements.Voltage supply (Vsup) should be higher than 4.75V.A frequency of 117.6MHzshould not be exceeded by its clock.
EPM9400RC208-15 Features
208-BFQFP Exposed Pad package
139 I/Os
The operating temperature of 0°C~70°C TA
208 pin count
EPM9400RC208-15 Applications
There are a lot of Rochester Electronics, LLC EPM9400RC208-15 CPLDs applications.
- DDC INTERFACE
- Wireless Infrastructure Base Band Unit and Remote Radio Unit
- TIMERS/COUNTERS
- Random logic replacement
- Interface bridging
- State machine control
- ROM patching
- ON-CHIP OSCILLATOR CIRCUIT
- Address decoders
- ANALOG-TO-DIGITAL CONVERTOR (ADC)
