Parameters |
Mounting Type |
Surface Mount |
Package / Case |
208-BFQFP Exposed Pad |
Surface Mount |
YES |
Operating Temperature |
0°C~70°C TA |
Packaging |
Tray |
Series |
MAX® 9000 |
JESD-609 Code |
e0 |
Pbfree Code |
no |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
Number of Terminations |
208 |
Terminal Finish |
TIN LEAD |
Additional Feature |
580 FLIP FLOPS; CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
Technology |
CMOS |
Terminal Position |
QUAD |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
220 |
Supply Voltage |
5V |
Terminal Pitch |
0.5mm |
Reach Compliance Code |
unknown |
Time@Peak Reflow Temperature-Max (s) |
30 |
Pin Count |
208 |
JESD-30 Code |
S-PQFP-G208 |
Qualification Status |
COMMERCIAL |
Supply Voltage-Min (Vsup) |
4.75V |
Programmable Type |
In System Programmable |
Number of I/O |
139 |
Clock Frequency |
100MHz |
Propagation Delay |
23.2 ns |
Number of Gates |
8000 |
Output Function |
MACROCELL |
Number of Macro Cells |
400 |
Voltage Supply - Internal |
4.75V~5.25V |
Delay Time tpd(1) Max |
20ns |
Number of Logic Elements/Blocks |
25 |
Height Seated (Max) |
4.1mm |
Length |
28mm |
Width |
28mm |
RoHS Status |
Non-RoHS Compliant |
EPM9400RC208-20 Overview
In the mobile phone network, there are 400macro cells, which are cells with high-power antennas and towers.The item is packaged with 208-BFQFP Exposed Pad.This device has 139 I/O ports programmed into it.The termination of a device is set to [0].As the terminal position of this electrical part is [0], it serves as an important access point for passengers and freight.An electrical supply voltage of 5V is used to power it.Trayshould be used for packaging the chip.During operation, the operating temperature is kept at 0°C~70°C TA to ensure its reliability.It is mounted in the way of Surface Mount.FPGAs belonging to the MAX? 9000series contain this type of chip.Chips are programmed with 208 pins.This device also displays [0].In digital circuits, 8000gates serve as building blocks.There are 25 logic elements/blocks, which are fundamental building blocks of field-programmable gate array (FPGA) technology.Ensure that the supply voltage (Vsup) exceeds 4.75V.Its clock frequency should not exceed 100MHz.
EPM9400RC208-20 Features
208-BFQFP Exposed Pad package
139 I/Os
The operating temperature of 0°C~70°C TA
208 pin count
EPM9400RC208-20 Applications
There are a lot of Rochester Electronics, LLC EPM9400RC208-20 CPLDs applications.
- Preset swapping
- I/O PORTS (MCU MODULE)
- State machine control
- PLC analog input modules
- LED Lighting systems
- Multiple Clock Source Selection
- Boolean function generators
- High speed graphics processing
- TIMERS/COUNTERS
- Reset swapping