Parameters |
Peak Reflow Temperature (Cel) |
NOT SPECIFIED |
Supply Voltage |
5V |
Terminal Pitch |
0.5mm |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
Pin Count |
240 |
JESD-30 Code |
S-PQFP-G240 |
Qualification Status |
Not Qualified |
Power Supplies |
3.3/55V |
Temperature Grade |
COMMERCIAL |
Supply Voltage-Min (Vsup) |
4.75V |
Number of I/O |
159 |
Clock Frequency |
100MHz |
Propagation Delay |
23.2 ns |
Programmable Logic Type |
EE PLD |
Number of Gates |
8000 |
Number of Logic Blocks (LABs) |
25 |
Output Function |
MACROCELL |
Number of Macro Cells |
400 |
JTAG BST |
YES |
In-System Programmable |
YES |
Height Seated (Max) |
4.1mm |
Length |
32mm |
Width |
32mm |
RoHS Status |
RoHS Compliant |
Mount |
Surface Mount |
Published |
1994 |
JESD-609 Code |
e0 |
Part Status |
Discontinued |
Number of Terminations |
240 |
Terminal Finish |
Tin/Lead (Sn/Pb) |
Max Operating Temperature |
70°C |
Min Operating Temperature |
0°C |
Additional Feature |
580 FLIP FLOPS; CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
HTS Code |
8542.39.00.01 |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
QUAD |
Terminal Form |
GULL WING |
EPM9400RC240-20 Overview
Currently, there are 400 macro cells, which are low-power cell sites (towers, antennas, masts) that serve as radio coverage.In this case, there are 159 I/Os programmed.It is programmed to terminate devices at [0].The terminal position of this electrical component is QUAD.There is 5V voltage supply for this device.This part is in the family [0].It is equipped with 240 pin count.Additionally, this device is capable of displaying [0].8000gates are devices that serve as building blocks for digital circuits.This device is mounted by Surface Mount.It operates from 3.3/55V power supplies.It is recommended that the operating temperature exceed 0°C.Temperatures should be lower than 70°C when operating.It consists of 25 logic blocks (LABs).It should be possible for Vsup to exceed 4.75Vat the supply voltage.This device should not have an clock frequency greater than 100MHz.A programmable logic type can be categorized as EE PLD.
EPM9400RC240-20 Features
159 I/Os
240 pin count
3.3/55V power supplies
25 logic blocks (LABs)
EPM9400RC240-20 Applications
There are a lot of Altera EPM9400RC240-20 CPLDs applications.
- Digital systems
- Field programmable gate
- D/T registers and latches
- SFP, QSFP, QSFP-DD, OSFP, Mini-SAS HD Port Management
- Preset swapping
- Auxiliary Power Supply Isolated and Non-isolated
- Synchronous or asynchronous mode
- Code converters
- Reset swapping
- LED Lighting systems