Parameters |
Mount |
Surface Mount |
Number of Pins |
208 |
Published |
1994 |
JESD-609 Code |
e0 |
Pbfree Code |
no |
Part Status |
Discontinued |
Moisture Sensitivity Level (MSL) |
3 |
Number of Terminations |
208 |
Terminal Finish |
Tin/Lead (Sn/Pb) |
Max Operating Temperature |
70°C |
Min Operating Temperature |
0°C |
Additional Feature |
676 FLIP FLOPS; CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
HTS Code |
8542.39.00.01 |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
QUAD |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
220 |
Supply Voltage |
5V |
Terminal Pitch |
0.5mm |
Time@Peak Reflow Temperature-Max (s) |
30 |
Pin Count |
208 |
Qualification Status |
Not Qualified |
Operating Supply Voltage |
5V |
Temperature Grade |
COMMERCIAL |
Max Supply Voltage |
5.25V |
Min Supply Voltage |
4.75V |
Number of I/O |
146 |
Memory Type |
EEPROM |
Clock Frequency |
117.6MHz |
Propagation Delay |
16.4 ns |
Programmable Logic Type |
EE PLD |
Number of Gates |
10000 |
Number of Logic Blocks (LABs) |
30 |
Output Function |
MACROCELL |
Number of Macro Cells |
480 |
JTAG BST |
YES |
In-System Programmable |
YES |
Height Seated (Max) |
4.1mm |
Length |
28mm |
Width |
28mm |
RoHS Status |
RoHS Compliant |
EPM9480RC208-15 Overview
There are 480 macro cells, which are cells in a mobile phone network that provides radio coverage served by a high-power cell site (tower, antenna or mast).It is programmed with 146 I/Os.It is programmed that device terminations will be 208 .There is a QUADterminal position on the electrical part in question.It is powered from a supply voltage of 5V.It belongs to the family [0].It has 208pins programmed.This device is also capable of displaying [0].In digital circuits, 10000gates serve as building blocks.High efficiency requires a voltage supply of [0].In order to store data, EEPROMis used.In this case, Surface Mountis used to mount the electronic component.It is designed with 208 pins.A maximum voltage of 5.25Vis required for operation.The device is designed to operate with a minimal supply voltage of 4.75VV.Ideally, the operating temperature should be greater than 0°C.It is recommended to keep the operating temperature below 70°C.It is composed of 30 logic blocks (LABs).clock frequency should not exceed [0].A programmable logic type is categorized as EE PLD.
EPM9480RC208-15 Features
146 I/Os
208 pin count
208 pins
30 logic blocks (LABs)
EPM9480RC208-15 Applications
There are a lot of Altera EPM9480RC208-15 CPLDs applications.
- Bootloaders for FPGAs
- Software-driven hardware configuration
- Programmable polarity
- Voltage level translation
- Software Configuration of Add-In Boards
- High speed graphics processing
- DMA control
- Programmable power management
- Synchronous or asynchronous mode
- Custom shift registers