Parameters |
Mount |
Surface Mount |
Published |
1994 |
JESD-609 Code |
e0 |
Part Status |
Discontinued |
Number of Terminations |
240 |
ECCN Code |
EAR99 |
Terminal Finish |
Tin/Lead (Sn/Pb) |
Max Operating Temperature |
70°C |
Min Operating Temperature |
0°C |
Additional Feature |
676 FLIP FLOPS; CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
HTS Code |
8542.39.00.01 |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
QUAD |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
NOT SPECIFIED |
Supply Voltage |
5V |
Terminal Pitch |
0.5mm |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
Pin Count |
240 |
JESD-30 Code |
S-PQFP-G240 |
Qualification Status |
Not Qualified |
Supply Voltage-Max (Vsup) |
5.25V |
Power Supplies |
3.3/55V |
Temperature Grade |
COMMERCIAL |
Supply Voltage-Min (Vsup) |
4.75V |
Number of I/O |
175 |
Clock Frequency |
100MHz |
Propagation Delay |
23.4 ns |
Programmable Logic Type |
EE PLD |
Number of Gates |
10000 |
Number of Logic Blocks (LABs) |
30 |
Output Function |
MACROCELL |
Number of Macro Cells |
480 |
JTAG BST |
YES |
In-System Programmable |
YES |
Height Seated (Max) |
4.1mm |
Length |
32mm |
Width |
32mm |
RoHS Status |
RoHS Compliant |
EPM9480RC240-20 Overview
480 macrocells are present in the mobile phone network, which offer radio coverage from a high-power cell tower, antenna, or mast.The device is programmed with 175 I/Os.Devices are programmed with terminations of [0].This electrical component has a terminal position of 0.A voltage of 5Vprovides power to the device.It belongs to the family [0].In this chip, the 240pins are programmed.This device can also display [0].For digital circuits, there are 10000gates. These devices serve as building blocks.In this case, Surface Mountis used to mount the electronic component.It operates from 3.3/55V power supplies.In this case, the maximum supply voltage (Vsup) reaches 5.25V.It is recommended that the operating temperature be greater than 0°C.It is recommended to keep the operating temperature below 70°C.It consists of 30 logic blocks (LABs).If the supply voltage (Vsup) is greater than 4.75V, then the device will work properly.It is recommended that the clock frequency not exceed 100MHz.A programmable logic type can be categorized as EE PLD.
EPM9480RC240-20 Features
175 I/Os
240 pin count
3.3/55V power supplies
30 logic blocks (LABs)
EPM9480RC240-20 Applications
There are a lot of Altera EPM9480RC240-20 CPLDs applications.
- SUPERVISORY FUNCTION (LVD AND WATCHDOG)
- Cross-Matrix Switch
- Handheld digital devices
- I2C BUS INTERFACE
- Interface bridging
- Custom state machines
- Timing control
- PLC analog input modules
- Multiple Clock Source Selection
- Programmable polarity