Parameters |
Factory Lead Time |
1 Week |
Mount |
Surface Mount |
Package / Case |
QFP |
Number of Pins |
240 |
Published |
1994 |
JESD-609 Code |
e3 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
3 |
Number of Terminations |
240 |
ECCN Code |
3A991 |
Terminal Finish |
MATTE TIN (472) OVER COPPER |
Max Operating Temperature |
70°C |
Min Operating Temperature |
0°C |
HTS Code |
8542.39.00.01 |
Technology |
CMOS |
Terminal Position |
QUAD |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
245 |
Supply Voltage |
5V |
Terminal Pitch |
0.5mm |
Time@Peak Reflow Temperature-Max (s) |
40 |
Pin Count |
240 |
Qualification Status |
Not Qualified |
Operating Supply Voltage |
5V |
Temperature Grade |
COMMERCIAL |
Max Supply Voltage |
5.25V |
Min Supply Voltage |
4.75V |
Operating Supply Current |
174mA |
Number of I/O |
191 |
Nominal Supply Current |
174mA |
Memory Type |
EEPROM |
Propagation Delay |
10 ns |
Frequency (Max) |
144MHz |
Programmable Logic Type |
EE PLD |
Number of Gates |
12000 |
Number of Programmable I/O |
191 |
Number of Logic Blocks (LABs) |
35 |
Speed Grade |
10 |
Output Function |
MACROCELL |
Number of Macro Cells |
560 |
Height Seated (Max) |
4.1mm |
Length |
32mm |
Width |
32mm |
RoHS Status |
RoHS Compliant |
EPM9560ARC240-10N Overview
There are 560 macro cells in the network, which are high-power cell sites that provide radio coverage (tower, antenna, or mast) for a mobile phone network.The item is packaged with QFP.There are 191 I/Os programmed in it.Devices are programmed with terminations of [0].There is a QUADterminal position on the electrical part in question.Power is supplied by a voltage of 5V volts.There are 240pins on the chip.It is possible to construct digital circuits using 12000gates, which are devices that serve as building blocks.For high efficiency, the supply voltage should be maintained at [0].It is recommended that data be stored in [0].The electronic part is mounted by Surface Mount.There are 240 pins on the device.A maximum voltage of 5.25Vis required for operation.The device is designed to operate with a minimal supply voltage of 4.75VV.A programmable I/O count of 191 has been recorded.It is recommended that the operating temperature be higher than 0°C.A temperature less than 70°Cshould be used for operation.It is composed of 35 logic blocks (LABs).It is recommended that the maximal frequency be less than 0.This kind of FPGA is composed of EE PLD.
EPM9560ARC240-10N Features
QFP package
191 I/Os
240 pin count
240 pins
35 logic blocks (LABs)
EPM9560ARC240-10N Applications
There are a lot of Altera EPM9560ARC240-10N CPLDs applications.
- Parity generators
- LED Lighting systems
- Cross-Matrix Switch
- State machine control
- Multiple Clock Source Selection
- SUPERVISORY FUNCTION (LVD AND WATCHDOG)
- Network Interface Card (NIC) and Host Bus Adapter (HBA)
- Power Meter SMPS
- Programmable power management
- Digital systems