Parameters |
Number of Terminations |
208 |
Terminal Finish |
Tin/Lead (Sn/Pb) |
HTS Code |
8542.39.00.01 |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
QUAD |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
220 |
Supply Voltage |
5V |
Terminal Pitch |
0.5mm |
Time@Peak Reflow Temperature-Max (s) |
20 |
Base Part Number |
EPM9560 |
JESD-30 Code |
S-PQFP-G208 |
Qualification Status |
Not Qualified |
Supply Voltage-Max (Vsup) |
5.5V |
Power Supplies |
3.3/55V |
Supply Voltage-Min (Vsup) |
4.5V |
Programmable Type |
In System Programmable |
Number of I/O |
153 |
Clock Frequency |
144.9MHz |
Propagation Delay |
11.4 ns |
Number of Gates |
12000 |
Output Function |
MACROCELL |
Number of Macro Cells |
560 |
JTAG BST |
YES |
Voltage Supply - Internal |
4.5V~5.5V |
Delay Time tpd(1) Max |
10ns |
Number of Logic Elements/Blocks |
35 |
Height Seated (Max) |
4.1mm |
Length |
28mm |
Width |
28mm |
RoHS Status |
Non-RoHS Compliant |
Mounting Type |
Surface Mount |
Package / Case |
208-BFQFP Exposed Pad |
Surface Mount |
YES |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tray |
Series |
MAX® 9000A |
JESD-609 Code |
e0 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
EPM9560ARI208-10 Overview
A mobile phone network consists of 560macro cells, which are radio coverage cells served by a high-power cell site (tower, antenna or mast).It is contained in package [0].It is programmed with 153 I/Os.Devices are programmed with terminations of [0].This electrical part is wired with a terminal position of QUAD.Power is provided by a supply voltage of 5V volts.It is a part of family [0].Trayis the packaging method.The operating temperature of the machine is -40°C~85°C TA to ensure its reliability.It is recommended to mount the chip by Surface Mount.The FPGA belongs to the MAX? 9000A series.According to the EPM9560, its related parts can be found.A digital circuit can be constructed using 12000gates.There are 35 logic elements/blocks, which are fundamental building blocks of field-programmable gate array (FPGA) technology.A power supply of 3.3/55Vis required to operate it.Vsup reaches 5.5Vas the maximum supply voltage.If the supply voltage (Vsup) is greater than 4.5V, then the device will work properly.clock frequency should not exceed [0].
EPM9560ARI208-10 Features
208-BFQFP Exposed Pad package
153 I/Os
The operating temperature of -40°C~85°C TA
3.3/55V power supplies
EPM9560ARI208-10 Applications
There are a lot of Intel EPM9560ARI208-10 CPLDs applications.
- Custom state machines
- Dedicated input registers
- Bootloaders for FPGAs
- D/T registers and latches
- Synchronous or asynchronous mode
- SUPERVISORY FUNCTION (LVD AND WATCHDOG)
- I2C BUS INTERFACE
- Auxiliary Power Supply Isolated and Non-isolated
- Voltage level translation
- Power automation