Parameters |
Mount |
Surface Mount |
Number of Pins |
208 |
Published |
1994 |
JESD-609 Code |
e0 |
Pbfree Code |
no |
Part Status |
Discontinued |
Moisture Sensitivity Level (MSL) |
3 |
Number of Terminations |
208 |
ECCN Code |
3A001.A.7.A |
Terminal Finish |
Tin/Lead (Sn/Pb) |
Max Operating Temperature |
70°C |
Min Operating Temperature |
0°C |
Additional Feature |
772 FLIP FLOPS; CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
HTS Code |
8542.39.00.01 |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
QUAD |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
220 |
Supply Voltage |
5V |
Terminal Pitch |
0.5mm |
Time@Peak Reflow Temperature-Max (s) |
30 |
Pin Count |
208 |
Qualification Status |
Not Qualified |
Operating Supply Voltage |
5V |
Temperature Grade |
COMMERCIAL |
Max Supply Voltage |
5.25V |
Min Supply Voltage |
4.75V |
Number of I/O |
153 |
Memory Type |
EEPROM |
Clock Frequency |
117.6MHz |
Propagation Delay |
16.6 ns |
Programmable Logic Type |
EE PLD |
Number of Gates |
12000 |
Number of Logic Blocks (LABs) |
35 |
Output Function |
MACROCELL |
Number of Macro Cells |
560 |
JTAG BST |
YES |
In-System Programmable |
YES |
Height Seated (Max) |
4.1mm |
Length |
28mm |
Width |
28mm |
RoHS Status |
RoHS Compliant |
EPM9560RC208-15 Overview
There are 560 macro cells, which are cells in a mobile phone network that provides radio coverage served by a high-power cell site (tower, antenna or mast).As a result, it has 153 I/O ports programmed.Devices are programmed with terminations of [0].This electrical part is wired with a terminal position of QUAD.There is 5V voltage supply for this device.The part belongs to Programmable Logic Devices family.There are 208pins on the chip.When using this device, 772 FLIP FLOPS; CONFIGURABLE I/O OPERATION WITH 3.3V OR 5Vcan also be found.A digital circuit can be constructed using 12000gates.High efficiency requires a voltage supply of [0].For data storage, EEPROMis adopted.In this case, it is mounted by Surface Mount.The 208pins are designed into the board.A voltage of 5.25V is the maximum supply voltage for this device.A minimum supply voltage of 4.75V is required for it to operate.It is recommended that the operating temperature exceed 0°C.A temperature less than 70°Cshould be used for operation.There are 35 logic blocks (LABs) in its basic building block.Ideally, its clock frequency should not exceed 117.6MHz.This kind of FPGA is composed of EE PLD.
EPM9560RC208-15 Features
153 I/Os
208 pin count
208 pins
35 logic blocks (LABs)
EPM9560RC208-15 Applications
There are a lot of Altera EPM9560RC208-15 CPLDs applications.
- USB Bus
- High speed graphics processing
- Software Configuration of Add-In Boards
- State machine design
- Custom shift registers
- TIMERS/COUNTERS
- SFP, QSFP, QSFP-DD, OSFP, Mini-SAS HD Port Management
- Battery operated portable devices
- LED Lighting systems
- Power automation