EPM9560RI240-20
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Mount | Surface Mount |
| Package / Case | QFP |
| Number of Pins | 240 |
| Published | 1994 |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Part Status | Discontinued |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 240 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Max Operating Temperature | 85°C |
| Min Operating Temperature | -40°C |
| Additional Feature | 772 FLIP FLOPS; CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
| HTS Code | 8542.39.00.01 |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 220 |
| Supply Voltage | 5V |
| Terminal Pitch | 0.5mm |
| Frequency | 100MHz |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 240 |
| Operating Supply Voltage | 5V |
| Temperature Grade | INDUSTRIAL |
| Max Supply Voltage | 5.5V |
| Min Supply Voltage | 4.5V |
| Operating Supply Current | 146mA |
| Number of I/O | 191 |
| Nominal Supply Current | 146mA |
| Memory Type | EEPROM |
| Propagation Delay | 20 ns |
| Turn On Delay Time | 20 ns |
| Frequency (Max) | 100MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 12000 |
| Number of Programmable I/O | 191 |
| Number of Logic Blocks (LABs) | 35 |
| Speed Grade | 20 |
| Output Function | MACROCELL |
| Number of Macro Cells | 560 |
| JTAG BST | YES |
| In-System Programmable | YES |
| Height Seated (Max) | 4.1mm |
| Length | 32mm |
| Width | 32mm |
| Radiation Hardening | No |
| RoHS Status | RoHS Compliant |
| Lead Free | Contains Lead |
EPM9560RI240-20 Overview
560 macrocells are present in the mobile phone network, which offer radio coverage from a high-power cell tower, antenna, or mast.It is contained in package [0].It is programmed with 191 I/Os.Devices are programmed with terminations of [0].As the terminal position of this electrical part is [0], it serves as an important access point for passengers or freight.A voltage of 5V is used as the power supply for this device.There is a part included in Programmable Logic Devices.It is equipped with 240 pin count.The device can also be used to find [0].A digital circuit can be constructed using 12000gates.A high level of efficiency can be achieved by maintaining the supply voltage at [0].It is recommended to store data in [0].In this case, Surface Mountis used to mount the electronic component.The device is designed with pins [0].It operates with the maximal supply voltage of 5.5V.With a minimal supply voltage of [0], it operates.There are a total of 191 Programmable I/Os.You can achieve 100MHzfrequencies.Operating temperatures should be higher than 0°C.The operating temperature should be lower than 85°C.There are 35logic blocks (LABs) that make up its basic building block.A maximum frequency of less than 100MHzis recommended.A programmable logic type can be categorized as EE PLD.
EPM9560RI240-20 Features
QFP package
191 I/Os
240 pin count
240 pins
35 logic blocks (LABs)
EPM9560RI240-20 Applications
There are a lot of Altera EPM9560RI240-20 CPLDs applications.
- STANDARD SERIAL INTERFACE UART
- Cross-Matrix Switch
- Software-driven hardware configuration
- Battery operated portable devices
- High speed graphics processing
- SFP, QSFP, QSFP-DD, OSFP, Mini-SAS HD Port Management
- Multiple DIP Switch Replacement
- White goods (Washing, Cold, Aircon ,...)
- Field programmable gate
- Auxiliary Power Supply Isolated and Non-isolated
