GAL18V10B-10LJ
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-LCC (J-Lead) |
| Number of Pins | 20 |
| Operating Temperature | 0°C~75°C TA |
| Packaging | Tube |
| Published | 2000 |
| Series | GAL®18V10 |
| JESD-609 Code | e0 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Lead (Sn85Pb15) |
| Additional Feature | REGISTER PRELOAD; POWER-UP RESET |
| HTS Code | 8542.39.00.01 |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | J BEND |
| Peak Reflow Temperature (Cel) | 225 |
| Supply Voltage | 5V |
| Terminal Pitch | 1.27mm |
| Frequency | 105MHz |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | GAL18V10 |
| Pin Count | 20 |
| Number of Outputs | 10 |
| Operating Supply Voltage | 5V |
| Power Supplies | 5V |
| Programmable Type | EE PLD |
| Max Supply Voltage | 5.25V |
| Min Supply Voltage | 4.75V |
| Number of I/O | 10 |
| Nominal Supply Current | 115mA |
| Propagation Delay | 10 ns |
| Turn On Delay Time | 10 ns |
| Architecture | PAL-TYPE |
| Output Function | MACROCELL |
| Number of Macro Cells | 10 |
| Number of Dedicated Inputs | 7 |
| Voltage Supply - Internal | 4.75V~5.25V |
| Number of Product Terms | 96 |
| Height Seated (Max) | 4.57mm |
| Length | 8.9662mm |
| Width | 8.9662mm |
| Radiation Hardening | No |
| RoHS Status | Non-RoHS Compliant |
| Lead Free | Lead Free |
GAL18V10B-10LJ Overview
Currently, there are 10 macro cells, which are low-power cell sites (towers, antennas, masts) that serve as radio coverage.In the 20-LCC (J-Lead)package, you will find it.There are 10 I/Os on the board.It is programmed that device terminations will be 20 .Its terminal position is QUAD.A voltage of 5Vprovides power to the device.The part is included in Programmable Logic Devices.Tubeshould be used to package the chip.To ensure its reliability, the operating temperature is set to [0].There should be a Surface Mounton the chip.As part of the GAL?18V10series, it is a type of FPGA.A chip with 20pins is programmed.When using this device, REGISTER PRELOAD; POWER-UP RESETis also available.The GAL18V10indicates that its related parts can be found.The supply voltage should be maintained at 5V for high efficiency.Surface Mountmounts this electronic component.The device has a pinout of [0].This device operates at a voltage of 5.25V when the maximum supply voltage is applied.It is powered by 4.75Vas its minimum supply voltage.This device runs on 5Vvolts of electricity.The frequency that can be achieved is 105MHz.To detect the status of input signals, there are 7dedicated inputs.This device is configured with a 10 output.A total of 96product terms are available on it.
GAL18V10B-10LJ Features
20-LCC (J-Lead) package
10 I/Os
The operating temperature of 0°C~75°C TA
20 pin count
20 pins
5V power supplies
10 outputs
GAL18V10B-10LJ Applications
There are a lot of Lattice Semiconductor Corporation GAL18V10B-10LJ CPLDs applications.
- Complex programmable logic devices
- Timing control
- I/O PORTS (MCU MODULE)
- PLC analog input modules
- Preset swapping
- Voltage level translation
- Digital designs
- Cross-Matrix Switch
- Random logic replacement
- Storage Cards and Storage Racks
