GAL18V10B-20LJ
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-LCC (J-Lead) |
| Number of Pins | 20 |
| Operating Temperature | 0°C~75°C TA |
| Packaging | Tube |
| Published | 2000 |
| Series | GAL®18V10 |
| JESD-609 Code | e0 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Lead (Sn85Pb15) |
| Additional Feature | REGISTER PRELOAD; POWER-UP RESET |
| HTS Code | 8542.39.00.01 |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | J BEND |
| Peak Reflow Temperature (Cel) | 225 |
| Supply Voltage | 5V |
| Terminal Pitch | 1.27mm |
| Frequency | 62.5MHz |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | GAL18V10 |
| Pin Count | 20 |
| Number of Outputs | 10 |
| Operating Supply Voltage | 5V |
| Power Supplies | 5V |
| Programmable Type | EE PLD |
| Max Supply Voltage | 5.25V |
| Min Supply Voltage | 4.75V |
| Number of I/O | 10 |
| Nominal Supply Current | 115mA |
| Propagation Delay | 20 ns |
| Turn On Delay Time | 20 ns |
| Architecture | PAL-TYPE |
| Output Function | MACROCELL |
| Number of Macro Cells | 10 |
| Number of Dedicated Inputs | 7 |
| Voltage Supply - Internal | 4.75V~5.25V |
| Number of Product Terms | 96 |
| Height Seated (Max) | 4.57mm |
| Length | 8.9662mm |
| Width | 8.9662mm |
| Radiation Hardening | No |
| RoHS Status | Non-RoHS Compliant |
| Lead Free | Lead Free |
GAL18V10B-20LJ Overview
There are 10 macro cells. A macro cell is a cell in a mobile phone network that provides radio coverage through the use of a high-power cell site (tower, antenna or mast).It is embedded in the 20-LCC (J-Lead) package.The device is programmed with 10 I/Os.Devices are programmed with terminations of [0].This electrical part has a terminal position of QUADand is connected to the ground.It is powered from a supply voltage of 5V.There is a part in the family [0].Tubeshould be used for packaging the chip.To ensure its reliability, the operating temperature is set to [0].Ideally, the chip should be mounted by Surface Mount.The FPGA belongs to the GAL?18V10 series.There are 20pins on the chip.If this device is used, you will also be able to find [0].You can find its related parts in the [0].High efficiency requires the supply voltage to be maintained at [0].In this case, Surface Mountis used to mount the electronic component.It is designed with 20 pins.A voltage of 5.25V is the maximum supply voltage for this device.It is powered by 4.75Vas its minimum supply voltage.In order for the device to operate, it requires 5V power supplies.There is 62.5MHz frequency that can be achieved.Input signals are detected by 7dedicated inputs.It is configured with an output of 10.It has been associated with 96product terms.
GAL18V10B-20LJ Features
20-LCC (J-Lead) package
10 I/Os
The operating temperature of 0°C~75°C TA
20 pin count
20 pins
5V power supplies
10 outputs
GAL18V10B-20LJ Applications
There are a lot of Lattice Semiconductor Corporation GAL18V10B-20LJ CPLDs applications.
- Multiple DIP Switch Replacement
- INTERRUPT SYSTEM
- LED Lighting systems
- Dedicated input registers
- Battery operated portable devices
- Parity generators
- Software-driven hardware configuration
- SUPERVISORY FUNCTION (LVD AND WATCHDOG)
- Storage Cards and Storage Racks
- State machine design
