HEF4027BT,652
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Mounting Type | Surface Mount |
| Package / Case | 16-SOIC (0.154, 3.90mm Width) |
| Surface Mount | YES |
| Number of Pins | 16 |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Published | 1998 |
| Series | 4000B |
| JESD-609 Code | e4 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| Type | JK Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Technology | CMOS |
| Voltage - Supply | 3V~15V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 4027 |
| Function | Set(Preset) and Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Number of Elements | 2 |
| Supply Voltage-Min (Vsup) | 3V |
| Load Capacitance | 50pF |
| Output Current | 2.4mA |
| Clock Frequency | 30MHz |
| Current - Quiescent (Iq) | 16μA |
| Current - Output High, Low | 3mA 3mA |
| Output Polarity | COMPLEMENTARY |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 60ns @ 15V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 7.5pF |
| fmax-Min | 4 MHz |
| Length | 9.9mm |
| Width | 3.9mm |
| RoHS Status | ROHS3 Compliant |
HEF4027BT,652 Overview
In the form of 16-SOIC (0.154, 3.90mm Width), it has been packaged. As part of the package Tube, it is embedded. There is a Differentialoutput configured with it. Positive Edgeis the trigger it is configured with. Surface Mountis in the way of this electric part. It operates with a supply voltage of 3V~15V. In this case, the operating temperature is -40°C~85°C TA. The type of this D latch is JK Type. In this case, it is a type of FPGA belonging to the 4000B series. You should not exceed 30MHzin the output frequency of the device. In total, it contains 2 elements. As a result, it consumes 16μA quiescent current and is not affected by external forces. There are 16 terminations,The object belongs to the 4027 family. The power supply voltage is 5V. JK flip flop input capacitance is 7.5pF farads. It is designed with 16 pins. Keeping the supply voltage (Vsup) above 3V is necessary for normal operation. In addition to its maximum design flexibility, the output current of the T flip flop is 2.4mA.
HEF4027BT,652 Features
Tube package
4000B series
16 pins
HEF4027BT,652 Applications
There are a lot of Nexperia USA Inc. HEF4027BT,652 Flip Flops applications.
- Shift Registers
- Guaranteed simultaneous switching noise level
- Single Down Count-Control Line
- Counters
- Bounce elimination switch
- ATE
- Divide a clock signal by 2 or 4
- Data storage
- High Performance Logic for test systems
- Storage Registers
