Parameters |
Mounting Type |
Surface Mount |
Package / Case |
84-LCC (J-Lead) |
Surface Mount |
YES |
Operating Temperature |
0°C~70°C TA |
Packaging |
Tube |
Published |
2000 |
Series |
ispLSI® 2000A |
JESD-609 Code |
e0 |
Pbfree Code |
no |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
Number of Terminations |
84 |
ECCN Code |
EAR99 |
Terminal Finish |
Tin/Lead (Sn85Pb15) |
Additional Feature |
YES |
HTS Code |
8542.39.00.01 |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
QUAD |
Terminal Form |
J BEND |
Peak Reflow Temperature (Cel) |
225 |
Supply Voltage |
5V |
Terminal Pitch |
1.27mm |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
ISPLSI 2064 |
Pin Count |
84 |
JESD-30 Code |
S-PQCC-J84 |
Qualification Status |
Not Qualified |
Supply Voltage-Max (Vsup) |
5.25V |
Power Supplies |
5V |
Supply Voltage-Min (Vsup) |
4.75V |
Programmable Type |
In System Programmable |
Number of I/O |
64 |
Clock Frequency |
77MHz |
Propagation Delay |
13 ns |
Number of Gates |
2000 |
Output Function |
MACROCELL |
Number of Macro Cells |
64 |
JTAG BST |
NO |
Voltage Supply - Internal |
4.75V~5.25V |
Delay Time tpd(1) Max |
10ns |
Number of Logic Elements/Blocks |
16 |
Height Seated (Max) |
4.572mm |
RoHS Status |
Non-RoHS Compliant |
ISPLSI 2064A-100LJ84 Overview
This network has 64macro cells, which are cells that provide radio coverage provided by a high-power cell site (tower, antenna, mast).It is embedded in the 84-LCC (J-Lead) package.This device has 64 I/O ports programmed into it.The termination of a device is set to [0].As the terminal position of this electrical part is [0], it serves as an important access point for passengers or freight.An electrical supply voltage of 5V is used to power it.The part is included in Programmable Logic Devices.Ideally, the chip should be packaged by Tube.To ensure reliability, the device operates at a temperature of [0].The chip should be mounted by Surface Mount.As part of the ispLSI? 2000Aseries, it is a type of FPGA.It is equipped with 84 pin count.This device can also display [0].According to the ISPLSI 2064, its related parts can be found.A digital circuit can be constructed using 2000gates.16logic blocks/elements are present.In order for the device to operate, it requires 5V power supplies.In this case, the maximum supply voltage (Vsup) reaches 5.25V.It is recommended that the supply voltage (Vsup) be greater than 4.75V.A frequency of 77MHzshould not be exceeded by its clock.
ISPLSI 2064A-100LJ84 Features
84-LCC (J-Lead) package
64 I/Os
The operating temperature of 0°C~70°C TA
84 pin count
5V power supplies
ISPLSI 2064A-100LJ84 Applications
There are a lot of Lattice Semiconductor Corporation ISPLSI 2064A-100LJ84 CPLDs applications.
- Synchronous or asynchronous mode
- POWER-SAVING MODES
- Wireless Infrastructure Base Band Unit and Remote Radio Unit
- D/T registers and latches
- White goods (Washing, Cold, Aircon ,...)
- Timing control
- Configurable Addressing of I/O Boards
- DMA control
- High speed graphics processing
- ON-CHIP OSCILLATOR CIRCUIT