ISPLSI 2064VE-135LT100I
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 100-LQFP |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tray |
| Published | 2000 |
| Series | ispLSI® 2000VE |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 100 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Additional Feature | YES |
| HTS Code | 8542.39.00.01 |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 240 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.5mm |
| Reach Compliance Code | not_compliant |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | ISPLSI 2064 |
| Pin Count | 100 |
| JESD-30 Code | S-PQFP-G100 |
| Qualification Status | Not Qualified |
| Supply Voltage-Max (Vsup) | 3.6V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 3V |
| Programmable Type | In System Programmable |
| Number of I/O | 64 |
| Clock Frequency | 100MHz |
| Propagation Delay | 7.5 ns |
| Number of Gates | 2000 |
| Output Function | MACROCELL |
| Number of Macro Cells | 64 |
| JTAG BST | NO |
| Voltage Supply - Internal | 3V~3.6V |
| Delay Time tpd(1) Max | 7.5ns |
| Number of Logic Elements/Blocks | 16 |
| Height Seated (Max) | 1.6mm |
| Length | 14mm |
| Width | 14mm |
| RoHS Status | Non-RoHS Compliant |
ISPLSI 2064VE-135LT100I Overview
A mobile phone network consists of 64macro cells, which are radio coverage cells served by a high-power cell site (tower, antenna or mast).There is a 100-LQFP package containing it.In this case, there are 64 I/Os programmed.100terminations have been programmed into the device.This electrical part is wired with a terminal position of QUAD.A voltage of 3.3V is used as the power supply for this device.It is a part of the family [0].The chip should be packaged by Tray.The temperature at which it operates is set to -40°C~85°C TAin order to ensure its reliability.Surface Mountshould be used for mounting the chip.In FPGA terms, it is a type of ispLSI? 2000VEseries FPGA.There are 100 pins on the chip.This device also displays [0].There are related parts in [0].It is possible to construct digital circuits using 2000gates, which are devices that serve as building blocks.There are 16 logic elements/blocks, which are fundamental building blocks of field-programmable gate array (FPGA) technology.A power supply of 3.3Vis required to operate it.In order to ensure proper operation, a maximum supply voltage (Vsup) of 3.6V is required.It should be possible for Vsup to exceed 3Vat the supply voltage.Ideally, its clock frequency should not exceed 100MHz.
ISPLSI 2064VE-135LT100I Features
100-LQFP package
64 I/Os
The operating temperature of -40°C~85°C TA
100 pin count
3.3V power supplies
ISPLSI 2064VE-135LT100I Applications
There are a lot of Lattice Semiconductor Corporation ISPLSI 2064VE-135LT100I CPLDs applications.
- Portable digital devices
- Dedicated input registers
- Random logic replacement
- Discrete logic functions
- D/T registers and latches
- Handheld digital devices
- Power automation
- ANALOG-TO-DIGITAL CONVERTOR (ADC)
- Preset swapping
- Power Meter SMPS
