Parameters |
Mounting Type |
Surface Mount |
Package / Case |
100-LQFP |
Surface Mount |
YES |
Operating Temperature |
0°C~70°C TA |
Packaging |
Tray |
Published |
2004 |
Series |
ispLSI® 2000VE |
JESD-609 Code |
e3 |
Pbfree Code |
yes |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
Number of Terminations |
100 |
ECCN Code |
EAR99 |
Terminal Finish |
Matte Tin (Sn) |
Additional Feature |
YES |
HTS Code |
8542.39.00.01 |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
QUAD |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
3.3V |
Terminal Pitch |
0.5mm |
Reach Compliance Code |
compliant |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
Base Part Number |
ISPLSI 2064 |
Pin Count |
100 |
JESD-30 Code |
S-PQFP-G100 |
Qualification Status |
Not Qualified |
Supply Voltage-Max (Vsup) |
3.6V |
Power Supplies |
3.3V |
Supply Voltage-Min (Vsup) |
3V |
Programmable Type |
In System Programmable |
Number of I/O |
64 |
Clock Frequency |
182MHz |
Propagation Delay |
5.5 ns |
Number of Gates |
2000 |
Output Function |
MACROCELL |
Number of Macro Cells |
64 |
JTAG BST |
NO |
Voltage Supply - Internal |
3V~3.6V |
Delay Time tpd(1) Max |
3.5ns |
Number of Logic Elements/Blocks |
16 |
Height Seated (Max) |
1.6mm |
Length |
14mm |
Width |
14mm |
RoHS Status |
RoHS Compliant |
ISPLSI 2064VE-280LTN100 Overview
There are 64 macro cells. A macro cell is a cell in a mobile phone network that provides radio coverage through the use of a high-power cell site (tower, antenna or mast).It is embedded in the 100-LQFP package.The device is programmed with 64 I/Os.100terminations are programmed into the device.QUADis the terminal position of this electrical part.There is 3.3V voltage supply for this device.The part belongs to Programmable Logic Devices family.It is recommended that the chip be packaged by Tray.Ensure its reliability by operating at [0].There should be a Surface Mounton the chip.The FPGA belongs to the ispLSI? 2000VE series.100pins are programmed on the chip.When using this device, YEScan also be found.There are related parts in [0].There are 2000 gates, which are devices that acts as a building block for digital circuits. 16logic elements/blocks exist.The system runs on a power supply of 3.3V watts.In this case, the maximum supply voltage (Vsup) is 3.6V.It is important that the supply voltage (Vsup) exceeds 3VV.It is recommended that the clock frequency not exceed 182MHz.
ISPLSI 2064VE-280LTN100 Features
100-LQFP package
64 I/Os
The operating temperature of 0°C~70°C TA
100 pin count
3.3V power supplies
ISPLSI 2064VE-280LTN100 Applications
There are a lot of Lattice Semiconductor Corporation ISPLSI 2064VE-280LTN100 CPLDs applications.
- Voltage level translation
- Multiple DIP Switch Replacement
- Configurable Addressing of I/O Boards
- Storage Cards and Storage Racks
- Software Configuration of Add-In Boards
- SUPERVISORY FUNCTION (LVD AND WATCHDOG)
- Custom state machines
- Parity generators
- Multiple Clock Source Selection
- Pattern recognition