ISPLSI 2096E-135LT128
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 128-LQFP |
| Surface Mount | YES |
| Operating Temperature | 0°C~70°C TA |
| Packaging | Tray |
| Published | 2000 |
| Series | ispLSI® 2000E |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 128 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Lead (Sn85Pb15) |
| Additional Feature | CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
| HTS Code | 8542.39.00.01 |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 240 |
| Supply Voltage | 5V |
| Terminal Pitch | 0.4mm |
| Reach Compliance Code | not_compliant |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | ISPLSI 2096 |
| Pin Count | 128 |
| JESD-30 Code | S-PQFP-G128 |
| Qualification Status | Not Qualified |
| Supply Voltage-Max (Vsup) | 5.25V |
| Power Supplies | 3.3/55V |
| Supply Voltage-Min (Vsup) | 4.75V |
| Programmable Type | In System Programmable |
| Number of I/O | 96 |
| Clock Frequency | 100MHz |
| Propagation Delay | 7.5 ns |
| Number of Gates | 4000 |
| Output Function | MACROCELL |
| Number of Macro Cells | 96 |
| JTAG BST | NO |
| Number of Dedicated Inputs | 3 |
| Voltage Supply - Internal | 4.75V~5.25V |
| Delay Time tpd(1) Max | 7.5ns |
| Number of Logic Elements/Blocks | 24 |
| Height Seated (Max) | 1.6mm |
| Length | 14mm |
| Width | 14mm |
| RoHS Status | Non-RoHS Compliant |
ISPLSI 2096E-135LT128 Overview
There are 96 macro cells, which are cells in a mobile phone network that provides radio coverage served by a high-power cell site (tower, antenna or mast).It is part of the 128-LQFP package.In this case, there are 96 I/Os programmed.It is programmed that device terminations will be 128 .This electrical component has a terminal position of 0.A voltage of 5Vprovides power to the device.There is a part in the family [0].It is recommended to package the chip by Tray.The device operates at a temperature of 0°C~70°C TAin order to ensure its reliability.It is recommended to mount the chip by Surface Mount.The ispLSI? 2000Eseries FPGA is one of these types.128pins are programmed on the chip.When using this device, CONFIGURABLE I/O OPERATION WITH 3.3V OR 5Vcan also be found.The ISPLSI 2096contains its related parts.In digital circuits, there are 4000gates, which act as a basic building block.There are 24 logic elements or blocks present.It runs on 3.3/55Vvolts of power.Vsup reaches 5.25Vas the maximum supply voltage.The status of input signals is determined by 3dedicated inputs.It should be possible for Vsup to exceed 4.75Vat the supply voltage.Its clock frequency should not exceed 100MHz.
ISPLSI 2096E-135LT128 Features
128-LQFP package
96 I/Os
The operating temperature of 0°C~70°C TA
128 pin count
3.3/55V power supplies
ISPLSI 2096E-135LT128 Applications
There are a lot of Lattice Semiconductor Corporation ISPLSI 2096E-135LT128 CPLDs applications.
- ToR/Aggregation/Core Switch and Router
- PLC analog input modules
- State machine control
- Power Meter SMPS
- High speed graphics processing
- ROM patching
- Synchronous or asynchronous mode
- Digital systems
- DMA control
- Discrete logic functions
