Parameters |
Mounting Type |
Surface Mount |
Package / Case |
128-LQFP |
Surface Mount |
YES |
Operating Temperature |
0°C~70°C TA |
Packaging |
Tray |
Published |
2000 |
Series |
ispLSI® 2000E |
JESD-609 Code |
e0 |
Pbfree Code |
no |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
Number of Terminations |
128 |
ECCN Code |
EAR99 |
Terminal Finish |
Tin/Lead (Sn85Pb15) |
Additional Feature |
CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
HTS Code |
8542.39.00.01 |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
QUAD |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
240 |
Supply Voltage |
5V |
Terminal Pitch |
0.4mm |
Reach Compliance Code |
not_compliant |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
ISPLSI 2096 |
Pin Count |
128 |
JESD-30 Code |
S-PQFP-G128 |
Qualification Status |
Not Qualified |
Supply Voltage-Max (Vsup) |
5.25V |
Power Supplies |
3.3/55V |
Supply Voltage-Min (Vsup) |
4.75V |
Programmable Type |
In System Programmable |
Number of I/O |
96 |
Clock Frequency |
125MHz |
Propagation Delay |
5 ns |
Number of Gates |
4000 |
Output Function |
MACROCELL |
Number of Macro Cells |
96 |
JTAG BST |
NO |
Number of Dedicated Inputs |
3 |
Voltage Supply - Internal |
4.75V~5.25V |
Delay Time tpd(1) Max |
5ns |
Number of Logic Elements/Blocks |
24 |
Height Seated (Max) |
1.6mm |
Length |
14mm |
Width |
14mm |
RoHS Status |
Non-RoHS Compliant |
ISPLSI 2096E-180LT128 Overview
In the mobile phone network, there are 96macro cells, which are cells with high-power antennas and towers.The item is packaged with 128-LQFP.It is equipped with 96I/O ports.Terminations of devices are set to [0].QUADis the terminal position of this electrical part.A voltage of 5V is used as the power supply for this device.There is a part in the family [0].Package the chip by Tray.Due to its reliability, it is operated at a temperature of [0].It is recommended that the chip be mounted by Surface Mount.In FPGA terms, it is a type of ispLSI? 2000Eseries FPGA.There are 128 pins on the chip.Additionally, this device is capable of displaying [0].The ISPLSI 2096indicates that related parts can be found.The 4000gates serve as building blocks for digital circuits.There are 24 logic elements/blocks, which are fundamental building blocks of field-programmable gate array (FPGA) technology.A total of 3.3/55V power supplies are needed to run it.5.25Vis the maximum supply voltage (Vsup).To detect input signals, there are 3 dedicated inputs.It is recommended that the supply voltage (Vsup) be greater than 4.75V.It is recommended that the clock frequency not exceed 125MHz.
ISPLSI 2096E-180LT128 Features
128-LQFP package
96 I/Os
The operating temperature of 0°C~70°C TA
128 pin count
3.3/55V power supplies
ISPLSI 2096E-180LT128 Applications
There are a lot of Lattice Semiconductor Corporation ISPLSI 2096E-180LT128 CPLDs applications.
- Battery operated portable devices
- Digital systems
- Storage Cards and Storage Racks
- Wide Vin Industrial low power SMPS
- I/O expansion
- Programmable power management
- Configurable Addressing of I/O Boards
- Voltage level translation
- TIMERS/COUNTERS
- Protection relays