ISPLSI 5256VE-165LF256
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 256-BGA |
| Surface Mount | YES |
| Operating Temperature | 0°C~70°C TA |
| Packaging | Tray |
| Published | 2000 |
| Series | ispLSI® 5000VE |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 256 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Lead (Sn63Pb37) |
| Additional Feature | YES |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 225 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 1mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | ISPLSI 5256 |
| Pin Count | 256 |
| Qualification Status | Not Qualified |
| Supply Voltage-Max (Vsup) | 3.6V |
| Power Supplies | 2.5/3.33.3V |
| Supply Voltage-Min (Vsup) | 3V |
| Programmable Type | In System Programmable |
| Number of I/O | 144 |
| Propagation Delay | 6 ns |
| Number of Gates | 12000 |
| Output Function | MACROCELL |
| Number of Macro Cells | 256 |
| JTAG BST | YES |
| Voltage Supply - Internal | 3V~3.6V |
| Delay Time tpd(1) Max | 6ns |
| Number of Logic Elements/Blocks | 8 |
| Height Seated (Max) | 2.1mm |
| Length | 17mm |
| Width | 17mm |
| RoHS Status | Non-RoHS Compliant |
ISPLSI 5256VE-165LF256 Overview
A mobile phone network consists of 256macro cells, which are radio coverage cells served by a high-power cell site (tower, antenna or mast).It is contained in package [0].The device is programmed with 144 I/Os.The device is programmed with 256 terminations.This electrical part is wired with a terminal position of BOTTOM.Power is supplied by a voltage of 3.3V volts.It is included in Programmable Logic Devices.Ideally, the chip should be packaged by Tray.To ensure its reliability, the operating temperature is set to [0].Mount the chip by Surface Mount.It belongs to the ispLSI? 5000VEseries of FPGAs.Chips are programmed with 256 pins.If this device is used, you will also be able to find [0].Its related parts can be found in the [0].A digital circuit can be constructed using 12000gates.8logic elements/blocks exist.A power supply of 2.5/3.33.3Vis required to operate it.Vsup reaches 3.6Vas the maximum supply voltage.Voltage supply (Vsup) should be higher than 3V.
ISPLSI 5256VE-165LF256 Features
256-BGA package
144 I/Os
The operating temperature of 0°C~70°C TA
256 pin count
2.5/3.33.3V power supplies
ISPLSI 5256VE-165LF256 Applications
There are a lot of Lattice Semiconductor Corporation ISPLSI 5256VE-165LF256 CPLDs applications.
- Software-driven hardware configuration
- Parity generators
- POWER-SAVING MODES
- SUPERVISORY FUNCTION (LVD AND WATCHDOG)
- USB Bus
- Page register
- High speed graphics processing
- State machine design
- Dedicated input registers
- STANDARD SERIAL INTERFACE UART
