Parameters |
Base Part Number |
ISPLSI 5384 |
Pin Count |
388 |
JESD-30 Code |
S-PBGA-B388 |
Qualification Status |
Not Qualified |
Supply Voltage-Max (Vsup) |
3.6V |
Power Supplies |
2.5/3.33.3V |
Supply Voltage-Min (Vsup) |
3V |
Programmable Type |
In System Programmable |
Number of I/O |
288 |
Clock Frequency |
91MHz |
Propagation Delay |
9.5 ns |
Number of Gates |
18000 |
Output Function |
MACROCELL |
Number of Macro Cells |
384 |
JTAG BST |
YES |
Voltage Supply - Internal |
3V~3.6V |
Delay Time tpd(1) Max |
7.5ns |
Number of Logic Elements/Blocks |
12 |
Height Seated (Max) |
3.25mm |
Length |
35mm |
Width |
35mm |
RoHS Status |
Non-RoHS Compliant |
Mounting Type |
Surface Mount |
Package / Case |
388-BBGA |
Surface Mount |
YES |
Operating Temperature |
0°C~70°C TA |
Packaging |
Tray |
Published |
2002 |
Series |
ispLSI® 5000VA |
JESD-609 Code |
e0 |
Pbfree Code |
no |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
Number of Terminations |
388 |
ECCN Code |
EAR99 |
Terminal Finish |
Tin/Lead (Sn/Pb) |
HTS Code |
8542.39.00.01 |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
BOTTOM |
Terminal Form |
BALL |
Peak Reflow Temperature (Cel) |
225 |
Supply Voltage |
3.3V |
Terminal Pitch |
1.27mm |
Time@Peak Reflow Temperature-Max (s) |
30 |
ISPLSI 5384VA-125LB388 Overview
There are 384 macro cells in the network, which are high-power cell sites that provide radio coverage (tower, antenna, or mast) for a mobile phone network.It is part of the 388-BBGA package.As you can see, this device has 288 I/O ports programmed into it.388terminations have been programmed into the device.This electrical component has a terminal position of 0.The power supply voltage is 3.3V.It belongs to the family [0].It is recommended that the chip be packaged by Tray.During operation, the operating temperature is kept at 0°C~70°C TA to ensure its reliability.It is recommended that Surface Mountholds the chip in place.In FPGA terms, it is a type of ispLSI? 5000VAseries FPGA.It is equipped with 388 pin count.The ISPLSI 5384contains its related parts.A digital circuit is built using 18000gates.There are 12 logic elements/blocks, which are fundamental building blocks of field-programmable gate array (FPGA) technology.Currently, it is powered by 2.5/3.33.3Vsources.The maximal supply voltage (Vsup) reaches 3.6V.There should be a higher supply voltage (Vsup) than 3V.This device should not have an clock frequency greater than 91MHz.
ISPLSI 5384VA-125LB388 Features
388-BBGA package
288 I/Os
The operating temperature of 0°C~70°C TA
388 pin count
2.5/3.33.3V power supplies
ISPLSI 5384VA-125LB388 Applications
There are a lot of Lattice Semiconductor Corporation ISPLSI 5384VA-125LB388 CPLDs applications.
- ON-CHIP OSCILLATOR CIRCUIT
- Field programmable gate
- Battery operated portable devices
- ToR/Aggregation/Core Switch and Router
- Software Configuration of Add-In Boards
- PLC analog input modules
- Timing control
- Voltage level translation
- Custom state machines
- Multiple Clock Source Selection