ISPLSI 5512VE-125LF388
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 388-BBGA |
| Surface Mount | YES |
| Operating Temperature | 0°C~70°C TA |
| Packaging | Tray |
| Published | 2000 |
| Series | ispLSI® 5000VE |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 388 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Additional Feature | YES |
| HTS Code | 8542.39.00.01 |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 225 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 1mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | ISPLSI 5512 |
| Pin Count | 388 |
| JESD-30 Code | S-PBGA-B388 |
| Qualification Status | Not Qualified |
| Supply Voltage-Max (Vsup) | 3.6V |
| Power Supplies | 2.5/3.33.3V |
| Supply Voltage-Min (Vsup) | 3V |
| Programmable Type | In System Programmable |
| Number of I/O | 256 |
| Clock Frequency | 87MHz |
| Propagation Delay | 7.5 ns |
| Number of Gates | 24000 |
| Output Function | MACROCELL |
| Number of Macro Cells | 512 |
| JTAG BST | YES |
| Voltage Supply - Internal | 3V~3.6V |
| Delay Time tpd(1) Max | 7.5ns |
| Number of Logic Elements/Blocks | 16 |
| Height Seated (Max) | 2.6mm |
| Length | 23mm |
| Width | 23mm |
| RoHS Status | Non-RoHS Compliant |
ISPLSI 5512VE-125LF388 Overview
In the mobile phone network, there are 512macro cells, which are cells with high-power antennas and towers.388-BBGAis the package in which it resides.The device is programmed with 256 I/O ports.There are 388 terminations programmed into the device.The terminal position of this electrical component is BOTTOM.The power source is powered by 3.3Vvolts.It is a part of family [0].It is recommended that the chip be packaged by Tray.Due to its reliability, it is operated at a temperature of [0].Ideally, the chip should be mounted by Surface Mount.FPGAs belonging to the ispLSI? 5000VEseries contain this type of chip.Chips are programmed with 388 pins.It is also possible to find YESwhen using this device.The ISPLSI 5512contains its related parts.In digital circuits, 24000gates serve as building blocks.16logic elements/blocks exist.A power supply of 2.5/3.33.3Vvolts is required to operate this device.3.6Vis the maximum supply voltage (Vsup).It should be possible for Vsup to exceed 3Vat the supply voltage.It should not exceed 87MHzin its clock frequency.
ISPLSI 5512VE-125LF388 Features
388-BBGA package
256 I/Os
The operating temperature of 0°C~70°C TA
388 pin count
2.5/3.33.3V power supplies
ISPLSI 5512VE-125LF388 Applications
There are a lot of Lattice Semiconductor Corporation ISPLSI 5512VE-125LF388 CPLDs applications.
- DMA control
- Multiple Clock Source Selection
- Software Configuration of Add-In Boards
- TIMERS/COUNTERS
- USB Bus
- Interface bridging
- STANDARD SERIAL INTERFACE UART
- Digital multiplexers
- Software-Driven Hardware Configuration
- PULSE WIDTH MODULATION (PWM)
