ISPLSI 5512VE-155LF256
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 256-BGA |
| Surface Mount | YES |
| Operating Temperature | 0°C~70°C TA |
| Packaging | Tray |
| Published | 2000 |
| Series | ispLSI® 5000VE |
| JESD-609 Code | e0 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 256 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Lead (Sn63Pb37) |
| Additional Feature | YES |
| HTS Code | 8542.39.00.01 |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Supply Voltage | 3.3V |
| Terminal Pitch | 1mm |
| Base Part Number | ISPLSI 5512 |
| Pin Count | 256 |
| JESD-30 Code | S-PBGA-B256 |
| Qualification Status | Not Qualified |
| Supply Voltage-Max (Vsup) | 3.6V |
| Power Supplies | 2.5/3.33.3V |
| Supply Voltage-Min (Vsup) | 3V |
| Programmable Type | In System Programmable |
| Number of I/O | 192 |
| Clock Frequency | 105MHz |
| Propagation Delay | 6.5 ns |
| Number of Gates | 24000 |
| Output Function | MACROCELL |
| Number of Macro Cells | 512 |
| JTAG BST | YES |
| Voltage Supply - Internal | 3V~3.6V |
| Delay Time tpd(1) Max | 6.5ns |
| Number of Logic Elements/Blocks | 16 |
| Height Seated (Max) | 2.1mm |
| Length | 17mm |
| Width | 17mm |
| RoHS Status | Non-RoHS Compliant |
ISPLSI 5512VE-155LF256 Overview
A mobile phone network consists of 512macro cells, which are radio coverage cells served by a high-power cell site (tower, antenna or mast).The item is packaged with 256-BGA.It is equipped with 192I/O ports.There is a 256terminations set on devices.BOTTOMis the terminal position of this electrical part.An electrical supply voltage of 3.3V is used to power it.This part is included in Programmable Logic Devices.Trayshould be used to package the chip.The device operates at a temperature of 0°C~70°C TAin order to ensure its reliability.The chip should be mounted by Surface Mount.The FPGA belongs to the ispLSI? 5000VE series.There are 256pins on the chip.This device also displays [0].You can find its related parts in the [0].The 24000gates serve as building blocks for digital circuits.There are 16 logic elements/blocks, which are fundamental building blocks of field-programmable gate array (FPGA) technology.A power supply of 2.5/3.33.3Vvolts is required to operate this device.There is a maximum supply voltage (Vsup) of 3.6V.It is important that the supply voltage (Vsup) exceeds 3VV.It should not exceed 105MHzin its clock frequency.
ISPLSI 5512VE-155LF256 Features
256-BGA package
192 I/Os
The operating temperature of 0°C~70°C TA
256 pin count
2.5/3.33.3V power supplies
ISPLSI 5512VE-155LF256 Applications
There are a lot of Lattice Semiconductor Corporation ISPLSI 5512VE-155LF256 CPLDs applications.
- STANDARD SERIAL INTERFACE UART
- Pattern recognition
- ON-CHIP OSCILLATOR CIRCUIT
- Custom state machines
- Custom shift registers
- POWER-SAVING MODES
- Handheld digital devices
- Software-Driven Hardware Configuration
- Boolean function generators
- State machine control
