ISPLSI 5512VE-80LF388I
| Parameters | |
|---|---|
| Number of Gates | 24000 |
| Output Function | MACROCELL |
| Number of Macro Cells | 512 |
| JTAG BST | YES |
| Voltage Supply - Internal | 3V~3.6V |
| Delay Time tpd(1) Max | 12ns |
| Number of Logic Elements/Blocks | 16 |
| Height Seated (Max) | 2.6mm |
| Length | 23mm |
| Width | 23mm |
| RoHS Status | Non-RoHS Compliant |
| Mounting Type | Surface Mount |
| Package / Case | 388-BBGA |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tray |
| Published | 2000 |
| Series | ispLSI® 5000VE |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 388 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Additional Feature | YES |
| HTS Code | 8542.39.00.01 |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 225 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 1mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | ISPLSI 5512 |
| Pin Count | 388 |
| JESD-30 Code | S-PBGA-B388 |
| Qualification Status | Not Qualified |
| Supply Voltage-Max (Vsup) | 3.6V |
| Power Supplies | 2.5/3.33.3V |
| Supply Voltage-Min (Vsup) | 3V |
| Programmable Type | In System Programmable |
| Number of I/O | 256 |
| Clock Frequency | 56MHz |
| Propagation Delay | 12 ns |
ISPLSI 5512VE-80LF388I Overview
There are 512 macro cells, which provide radio coverage via high-power cell towers, antennas or masts in a mobile phone network.The item is packaged with 388-BBGA.In this case, there are 256 I/Os programmed.It is programmed that device terminations will be 388 .As the terminal position of this electrical part is [0], it serves as an important access point for passengers or freight.The power supply voltage is 3.3V.There is a part in the family [0].It is recommended to package the chip by Tray.To ensure its reliability, the operating temperature is set to [0].Surface Mountshould be used for mounting the chip.In FPGA terms, it is a type of ispLSI? 5000VEseries FPGA.It has 388pins programmed.If this device is used, you will also be able to find [0].The ISPLSI 5512can be used to identify its related parts.It is possible to construct digital circuits using 24000gates, which are devices that serve as building blocks.There are 16 logic elements/blocks, which are fundamental building blocks of field-programmable gate array (FPGA) technology.In order for the device to operate, it requires 2.5/3.33.3V power supplies.Supply voltage (Vsup) reaches a maximum of 3.6V.It is recommended that the supply voltage (Vsup) be greater than 3V.This device should not have an clock frequency greater than 56MHz.
ISPLSI 5512VE-80LF388I Features
388-BBGA package
256 I/Os
The operating temperature of -40°C~85°C TA
388 pin count
2.5/3.33.3V power supplies
ISPLSI 5512VE-80LF388I Applications
There are a lot of Lattice Semiconductor Corporation ISPLSI 5512VE-80LF388I CPLDs applications.
- Address decoding
- Multiple Clock Source Selection
- POWER-SAVING MODES
- High speed graphics processing
- Dedicated input registers
- I2C BUS INTERFACE
- Digital multiplexers
- TIMERS/COUNTERS
- Pattern recognition
- LED Lighting systems
